AT91 datasheet(24/153 Pages) ATMEL

24 / 153 page

AT91X40 Series

1354D–ATARM–08/02

Byte Write or Byte Select

Access

Each chip select with a 16-bit data bus can operate with one of two different types of

write access:

•

Byte Write Access supports two byte write and a single read signal.

•

Byte Select Access selects upper and/or lower byte with two byte select lines, and

separate read and write signals.

This option is controlled by the BAT field in the EBI_CSR (Chip Select Register) for the

corresponding chip select.

Byte Write Access is used to connect 2 x 8-bit devices as a 16-bit memory page.

•

The signal A0/NLB is not used.

•

The signal NWR1/NUB is used as NWR1 and enables upper byte writes.

•

The signal NWR0/NWE is used as NWR0 and enables lower byte writes.

•

The signal NRD/NOE is used as NRD and enables half-word and byte reads.

Figure 11 shows how to connect two 512K x 8-bit devices in parallel on NCS2.

Figure 11. Memory Connection for 2 x 8-bit Data Busses

EBI

D0 - D7

D8 - D15

A1 - A19

NWR0

NRD

NCS2

D0 - D7

A0 - A18

Write Enable

Read Enable

Memory Enable

NWR1

D8 - D15

A0 - A18

Write Enable

Read Enable

Memory Enable

AT91 Datasheet(PDF) 24 Page - ATMEL Corporation

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