 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AT91 Datasheet(PDF) 91 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT91 Datasheet(HTML) 91 Page - ATMEL Corporation |
|
|
91 / 153 page  91 AT91X40 Series 1354D–ATARM–08/02 WD Clock Mode Register Name:WD_CMR Access: Read/Write Reset Value:0 Offset: 0x04 • WDCLKS: Clock Selection • HPCV: High Preload Counter Value (Code Label WD_HPCV) Counter is preloaded when watchdog counter is restarted with bits 0 to 11 set (FFF) and bits 12 to 15 equaling HPCV. • CKEY: Clock Access Key (Code Label WD_CKEY) Used only when writing WD_CMR. CKEY is read as 0. 0x06E: Write access in WD_CMR is allowed. Other value: Write access in WD_CMR is prohibited. 31 30 29 28 27 26 25 24 –– ––– –– – 23 22 21 20 19 18 17 16 –– ––– –– – 15 14 13 12 11 10 9 8 CKEY 76 54 32 10 CKEY – HPCV WDCLKS WDCLKS Clock Selected Code Label WD_WDCLKS 00 MCK/8 WD_WDCLKS_MCK8 01 MCK/32 WD_WDCLKS_MCK32 10 MCK/128 WD_WDCLKS_MCK128 1 1 MCK/1024 WD_WDCLKS_MCK1024 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
