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AT91 Datasheet(PDF) 93 Page - ATMEL Corporation |
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AT91 Datasheet(HTML) 93 Page - ATMEL Corporation |
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93 / 153 page ![]() 93 AT91X40 Series 1354D–ATARM–08/02 WD Enabling Sequence To enable the Watchdog Timer the sequence is as follows: 1. Disable the Watchdog by clearing the bit WDEN: Write 0x2340 to WD_OMR This step is unnecessary if the WD is already disabled (reset state). 2. Initialize the WD Clock Mode Register: Write 0x373C to WD_CMR (HPCV = 15 and WDCLKS = MCK/8) 3. Restart the timer: Write 0xC071 to WD_CR 4. Enable the watchdog: Write 0x2345 to WD_OMR (interrupt enabled) |
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