AT91 datasheet(151/153 Pages) ATMEL

151 / 153 page

iii

AT91X40 Series

1354D–ATARM–08/02

PIO Output Enable Register ............................................................................... 81

PIO Output Disable Register .............................................................................. 81

PIO Output Status Register ................................................................................ 82

PIO Input Filter Enable Register ......................................................................... 83

PIO Input Filter Disable Register ........................................................................ 83

PIO Input Filter Status Register .......................................................................... 84

PIO Set Output Data Register ............................................................................ 85

PIO Clear Output Data Register ......................................................................... 85

PIO Output Data Status Register........................................................................ 86

PIO Pin Data Status Register ............................................................................. 86

PIO Interrupt Enable Register............................................................................. 87

PIO Interrupt Disable Register............................................................................ 87

PIO Interrupt Mask Register ............................................................................... 88

PIO Interrupt Status Register.............................................................................. 88

WD: Watchdog Timer ......................................................................... 89

WD User Interface .............................................................................................. 90

WD Overflow Mode Register .............................................................................. 90

WD Clock Mode Register ................................................................................... 91

WD Control Register........................................................................................... 92

WD Status Register ............................................................................................ 92

WD Enabling Sequence...................................................................................... 93

SF: Special Function Registers......................................................... 94

Chip Identification ............................................................................................... 94

SF User Interface................................................................................................ 94

Chip ID Register ................................................................................................. 95

Chip ID Extension Register................................................................................. 96

Reset Status Register......................................................................................... 97

SF Memory Mode Register................................................................................. 98

SF Protect Mode Register .................................................................................. 98

USART: Universal Synchronous/Asynchronous

Receiver/Transmitter .......................................................................... 99

Pin Description.................................................................................................... 99

Baud Rate Generator........................................................................................ 100

Receiver............................................................................................................ 101

Transmitter........................................................................................................ 103

Break ................................................................................................................ 104

Peripheral Data Controller ................................................................................ 105

Interrupt Generation.......................................................................................... 105

Channel Modes................................................................................................. 105

USART User Interface ...................................................................................... 107

USART Control Register................................................................................... 108

USART Mode Register ..................................................................................... 110

USART Interrupt Enable Register..................................................................... 112

AT91 Datasheet(PDF) 151 Page - ATMEL Corporation

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