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PM5313 Datasheet(PDF) 65 Page - PMC-Sierra, Inc |
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PM5313 Datasheet(HTML) 65 Page - PMC-Sierra, Inc |
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65 / 646 page  PRODUCTION PMC-Sierra, Inc. PM5313 SPECTRA-622 DATASHEET PMC-1981162 ISSUE 6 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S PROPRIETARY AND CONFIDENTIAL 33 Pin Name Type Pin No. Function TCLK Output AL7 The transmit byte clock (TCLK) output provides a timing reference for the SPECTRA-622 transmit functions. TCLK is a nominally 77.76 MHz. When the parallel line interface is enabled without the serial interface, TCLK is a buffered version of TDCK. In all modes where the serial line interface is enabled, TCLK is a divide by eight version of the synthesized transmit line clock. TCLK has an arbitrary phase alignment with respect to the synthesized serial 622.06 MHz transmit clock. The TCLK output can be disabled and held low by programming the TCLKEN bit in the SPECTRA-622 Clock Control register. TFP, TC1J1V1/TFPO, TPL, TDP and TD[7:0] are updated on the rising edge of TCLK. TFPI, TLRDI and TLAIS are sampled on the rising edge of TCLK. |
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