PM7375-SC datasheet(28/430 Pages) PMC

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PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PIN DESCRIPTION (TOTAL 208)

8.1

Line Side Interface Signals (24)

Name

Type

No.

Feature

RXD+

RXD-

PECL

Input

136

137

The receive differential data inputs (RXD+, RXD-)

contain the 155.52 Mbit/s receive STS-3c (STM-1)

stream or the 51.84 Mbit/s receive STS-1 stream.

RXD+/- are sampled on the rising edge of RRCLK+/-

when clock recovery is disabled (the falling edge may

be used by reversing RRCLK+/-), otherwise the

receive clocks are recovered from the RXD+/- bit

stream. RXD+/- is expected to be NRZ encoded.

RRCLK+

RRCLK-

PECL

Input

142

143

The receive differential reference clock inputs

(RRCLK+, RRCLK-) contain a jitter-free 19.44 MHz or

6.48 MHz reference clock when clock recovery is

enabled. When clock recovery is bypassed, RRCLK+/-

is nominally a 155.52 MHz or 51.84 MHz, 50% duty

cycle clock and provide timing for the LASAR-155

receive functions. In this case, RXD+/- is sampled on

the rising edge of RRCLK+/-.

Clock recovery bypass is selectable using the RBYP

bit in the LASAR-155 Master Configuration register.

ALOS+

ALOS-

PECL

Input

138

139

The analog loss of signal (ALOS+/-) differential inputs

are used to indicate a loss of receive signal power.

When ALOS+/- is asserted, the data on the receive

data (RXD+/-) pin will be squelched and the phase

locked loop shall switch to the reference clock

(RRCLK+/-) to keep the recovered clock in range.

These inputs must be DC coupled.

LF+,

LF-,

LFO

Analog

149

148

147

Passive components connected to the recovery loop

filter (LF+, LF- and LFO) pins determine the dynamics

of the clock recovery unit. Refer to the Operation

section for details.

PM7375-SC Datasheet(PDF) 28 Page - PMC-Sierra, Inc

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