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PM7375-SC Datasheet(PDF) 66 Page - PMC-Sierra, Inc |
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PM7375-SC Datasheet(HTML) 66 Page - PMC-Sierra, Inc |
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66 / 430 page ![]() PM7375 LASAR-155 DATA SHEET PMC-931127 ISSUE 6 LOCAL ATM SAR & PHYSICAL LAYER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 50 9.5 Connection Parameter Store The Connection Parameter Store (COPS) block provides the internal VC parameter storage for both the 128 receive VCs and 128 transmit VCs. The COPS block provides VC parameter access to the RALP, TATS and TALP blocks. In addition, indirect access to the parameter memory space is also provided to the microprocessor and PCI Host. 9.6 SAR Performance Monitor The SAR Performance Monitor (SAR PMON) block interfaces directly to the RALP and PCID blocks and accumulates the following statistics: - ATM Cell unprovisioned VPI/VCI errors - ATM Cell CRC-10 errors - Receive CPAAL5_PDU Invalid Common Part Indicator errors - Receive CPAAL5_PDU Invalid SDU Length errors - Receive CPAAL5_PDU CRC-32 errors - Receive CPAAL5_PDU Oversize PDU errors - Receive CPAAL5_PDU Abort errors - Receive CPAAL5_PDU Count - Receive Buffer errors - Transmit CPAAL5_PDU Oversize SDU errors - Transmit CPAAL5_PDU Count Counts are accumulated in saturating counters. ATM Cell counters are sized such that they can be polled once per second. Packet registers are sized such that they can be polled once per second given that every CPAAL5_PDU is in error and the average packet size is 8 cells. If CPAAL5_PDU characteristics are different and exact CPAAL5_PDU counts must be maintained, the user must poll every 125 ms. When the RACP block declared loss of cell delineation (LCD), no receive statistics are accumulated. The user can indicate the end of an accumulation interval by writing to the LASAR-155 Master Reset / Load Meters register. The write will transfer the current counter values into visible registers and will reset the counters to begin accumulating error events for the next interval. Writing to the LASAR-155 Master Reset / Load Meters register initiates transfers for all counters in all blocks (i.e. RSOP, RLOP, RPOP, RACP, TACP and SAR PMON). |
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