PM7375-SC datasheet(5/430 Pages) PMC

5 / 430 page

PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

iii

9.12.1

CLOCK SYNTHESIS ........................................................................................59

9.12.2

PARALLEL TO SERIAL CONVERTER..............................................................59

9.13

JTAG TEST ACCESS PORT INTERFACE.......................................................................59

9.14

PCI DMA CONTROLLER INTERFACE ...........................................................................59

9.14.1

PCI INTERFACE AND MAILBOX ......................................................................60

9.14.2

TRANSMIT REQUEST MACHINE ....................................................................62

9.14.3

TRANSMIT DESCRIPTOR TABLE....................................................................62

9.14.4

TRANSMIT QUEUES AND OPERATION..........................................................64

9.14.5

TRANSMIT DESCRIPTOR DATA STRUCTURE ...............................................69

9.14.6

RECEIVE REQUEST MACHINE.......................................................................75

9.14.7

RECEIVE PACKET DESCRIPTOR TABLE........................................................75

9.14.8

RECEIVE PACKET QUEUES AND OPERATION..............................................77

9.14.9

RECEIVE PACKET DESCRIPTOR DATA STRUCTURE ...................................81

9.14.10 RECEIVE MANAGEMENT DESCRIPTOR TABLE ............................................85

9.14.11 RECEIVE MANAGEMENT QUEUES................................................................87

9.14.12 RECEIVE MANAGEMENT DESCRIPTOR DATA STRUCTURE .......................89

9.15

MICROPROCESSOR INTERFACE .................................................................................91

9.16

MICROPROCESSOR AND PCI HOST NORMAL MODE REGISTER MEMORY MAP...91

9.16.1

NORMAL MODE REGISTER MEMORY MAP ..................................................93

NORMAL MODE REGISTER DESCRIPTIONS.............................................................................99

10.1

SELECTABLE MASTER REGISTERS ..........................................................................100

10.1.1

10.1.2

10.1.3

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