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PM7375-SC Datasheet(PDF) 47 Page - PMC-Sierra, Inc

Part # PM7375-SC
Description  LOCAL ATM SAR & PHYSICAL LAYER
PDF  430 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7375-SC Datasheet(HTML) 47 Page - PMC-Sierra, Inc

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PM7375 LASAR-155
DATA SHEET
PMC-931127
ISSUE 6
LOCAL ATM SAR & PHYSICAL LAYER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
31
8.4
Microprocessor Interface Signals (31)
Pin
Name
Type
Pin
No.
Feature
MPENB
Input
153
The active low microprocessor port enable (MPENB)
signal is used to configure the Microprocessor
Interface Port for master or slave mode operation. If
MPENB is low, the port is configured for slave mode
operation and an external microprocessor is permitted
to access LASAR-155 registers using signals, CSB,
RDB, WRB, D[15:0] and A[8:0]. Please refer to the
Normal Mode Register Description Section for register
details.
If MPENB is high, LASAR-155 register accesses using
the Microprocessor Interface Port is disabled. The
Microprocessor Interface Port is configured as a
master and the PCI Host has control of all internal
LASAR-155 registers and the LASAR-155 Local Bus.
CSB/CS1B
I/O
161
For slave mode operation the active low chip select
(CSB) signal is configured as an input. CSB is low
during LASAR-155 Microprocessor Interface Port
register accesses. If CSB is not used and
Microprocessor Interface Port register accesses are
controlled using only the RDB and the WRB signals,
CSB should be connected to an inverted version of
RSTB.
For master mode operation the active low chip select
one (CS1B) signal is configured as an output. CS1B is
set low during LASAR-155 Local Bus accesses to the
External Devices address space as defined using the
External Device Memory Base Address register. For
this mode of operation CS1B is generated on the rising
edge of PCICLK.



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