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C8051F360 Datasheet(PDF) 155 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 155 Page - Silicon Laboratories |
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155 / 288 page ![]() Table 15.1. EMIF Pinout (C8051F360/3) Rev. 1.0 155 C8051F360/1/2/3/4/5/6/7/8/9 SFR Definition 15.1. EMI0CN: External Memory Interface Control Bits 7–0: PGSEL[7:0]: XRAM Page Select Bits. The XRAM Page Select Bits provide the high byte of the 16-bit external data memory address when using an 8-bit MOVX command, effectively selecting a 256-byte page of RAM. 0x00: 0x0000 to 0x00FF 0x01: 0x0100 to 0x01FF ... 0xFE: 0xFE00 to 0xFEFF 0xFF: 0xFF00 to 0xFFFF SFR Page: SFR Address: all pages 0xAA R/W R/W R/W R/W R/W R/W R/W R/W Reset Value PGSEL7 PGSEL6 PGSEL5 PGSEL4 PGSEL3 PGSEL2 PGSEL1 PGSEL0 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Multiplexed Mode Non Multiplexed Mode Signal Name Port Pin Signal Name Port Pin /RD P4.4 /RD P4.4 /WR P4.5 /WR P4.5 ALE P0.0 ALE P0.0 D0/A0 P1.0 D0 P1.0 D1/A1 P1.1 D1 P1.1 D2/A2 P1.2 D2 P1.2 D3/A3 P1.3 D3 P1.3 D4/A4 P1.4 D4 P1.4 D5/A5 P1.5 D5 P1.5 D6/A6 P1.6 D6 P1.6 D7/A7 P1.7 D7 P1.7 A8 P3.4 A0 P2.0 A9 P3.5 A1 P2.1 A10 P3.6 A2 P2.2 A11 P3.7 A3 P2.3 A12 P4.0 A4 P2.4 A13 P4.1 A5 P2.5 A14 P4.2 A6 P2.6 A15 P4.3 A7 P2.7 – – A8 P3.4 – – A9 P3.5 –– A10 P3.6 –– A11 P3.7 –– A12 P4.0 –– A13 P4.1 –– A14 P4.2 –– A15 P4.3 |
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