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SI3233 Datasheet(PDF) 87 Page - Silicon Laboratories |
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SI3233 Datasheet(HTML) 87 Page - Silicon Laboratories |
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87 / 100 page ![]() Si3233 Preliminary Rev. 0.5 87 Table 33. Digital Programmable Gain/Attenuation Indirect Registers Summary Addr D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 13 DACG[11:0] 14 ADCG[11:0] Table 34. Digital Programmable Gain/Attenuation Indirect Registers Description Addr. Description 13 Receive Path Digital to Analog Converter Gain/Attenuation. This register sets gain/attenuation for the receive path. The digitized signal is effectively multiplied by DACG to achieve gain/attenuation. A value of 0x00 corresponds to – ∞ dB gain (mute). A value of 0x400 corresponds to unity gain. A value of 0x7FF corresponds to a gain of 6 dB. 14 Transmit Path Analog to Digital Converter Gain/Attenuation. This register sets gain/attenuation for the transmit path. The digitized signal is effectively multiplied by ADCG to achieve gain/attenuation. A value of 0x00 corresponds to – ∞ dB gain (mute). A value of 0x400 corresponds to unity gain. A value of 0x7FF corresponds to a gain of 6 dB. |
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