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SI3233 Datasheet(PDF) 21 Page - Silicon Laboratories |
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SI3233 Datasheet(HTML) 21 Page - Silicon Laboratories |
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21 / 100 page ![]() Si3233 Preliminary Rev. 0.5 21 2.2.5. Power Monitoring and Line Fault Detection In addition to reporting voltages and currents, the ProSLIC continuously monitors the power dissipated in each linefeed transistor. Realtime output power of any one of the six linefeed transistors can be read by setting the Power Monitor Pointer (direct Register 76) to point to the desired transistor and then reading the Line Power Output Monitor (direct Register 77). The realtime power measurements are low-pass filtered and compared to a maximum power threshold. Maximum power thresholds and filter time constants are software programmable and should be set for each transistor pair based on the characteristics of the transistors used. Table 22 describes the registers associated with this function. If the power in any external transistor exceeds the programmed threshold, a power alarm event is triggered. The ProSLIC sets the Power Alarm register bit, generates an interrupt (if enabled), and automatically enters the Open state (if AOPN = 1). This feature protects the external transistors from fault conditions and, combined with the loop voltage and current monitors, allows diagnosis of the type of fault condition present on the line. The value of each thermal low-pass filter pole is set according to the equation: where τ is the thermal time constant of the transistor package, 4096 is the full range of the 12-bit register, and 800 is the sample rate in hertz. Generally τ = 3 seconds for SOT223 packages and τ = 0.16 seconds for SOT23, but check with the manufacturer for the package thermal constant of a specific device. For example, the power alarm threshold and low-pass filter values for Q5 and Q6 using a SOT223 package transistor are computed as follows: Thus, indirect Register 21 should be set to 2Ah x 27 = 1500h. Note: The power monitor resolution for Q3 and Q4 is different from that of Q1, Q2, Q5, and Q6. Thermal LPF Pole [12:0] 4096 800 τ × ------------------ = PT56[7:0] PMAX Resolution ------------------------------- 1.28 0.0304 ------------------ 42 2Ah == = = Table 22. Associated Power Monitoring and Power Fault Registers Parameter Description/ Range Resolution Register Bits Location* Power Monitor Pointer 0 to 5 points to Q1 to Q6, respectively N/A PWRMP[2:0] Direct Register 76 Line Power Monitor Output 0 to 7.8 W for Q1, Q2, Q5, Q6 0 to 0.9 W for Q3, Q4 30.4 mW 3.62 mW PWROM[7:0] Direct Register 77 Power Alarm Threshold, Q1 & Q2 0 to 7.8 W 30.4 mW PPT12[7:0] Indirect Register 19 Power Alarm Threshold, Q3 & Q4 0 to 0.9 W 3.62 mW PPT34[7:0] Indirect Register 20 Power Alarm Threshold, Q5 & Q6 0 to 7.8 W 30.4 mW PPT56[7:0] Indirect Register 21 Thermal LPF Pole, Q1 & Q2 see equation above NQ12[12:0] Indirect Register 24 Thermal LPF Pole, Q3 & Q4 see equation above NQ34[12:0] Indirect Register 25 Thermal LPF Pole, Q5 & Q6 see equation above NQ56[12:0] Indirect Register 26 Power Alarm Interrupt Pending Bits 2 to 7 corre- spond to Q1 to Q6, respectively N/A QnAP[n+1], where n = 1 to 6 Direct Register 19 |
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