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SI3233 Datasheet(PDF) 38 Page - Silicon Laboratories |
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SI3233 Datasheet(HTML) 38 Page - Silicon Laboratories |
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38 / 100 page  Si3233 38 Preliminary Rev. 0.5 3. Control Registers Indirect registers are accessed through direct registers 28 through 31. Instructions on how to access them is described in “4. Indirect Registers” beginning on page 85. Note: Any register not listed here is reserved and must not be written. Table 29. Direct Register Summary Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Setup 0 SPI Mode Select SPIDC SPIM PNI[1:0] RNI[3:0] Audio 9 Audio Gain Control ARX[1:0] 10 Two-Wire Impedance Synthesis Control CLC[1:0] TISE TISS[2:0] 11 Reserved Powerdown 14 Power Down Control 1 DCOF PFR BIASOF SLICOF 15 Power Down Control 2 DACM DACON GMM GMON Interrupts 18 Interrupt Status 1 PMIP PMAP RGIP RGAP O2IP O2AP O1IP O1AP 19 Interrupt Status 2 Q6AP Q5AP Q4AP Q3AP Q2AP Q1AP LCIP RTIP 20 Interrupt Status 3 CMCP INDP DTMFP 21 Interrupt Enable 1 PMIE PMAE RGIE RGAE O2IE O2AE O1IE O1AE 22 Interrupt Enable 2 Q6AE Q5AE Q4AE Q3AE Q2AE Q1AE LCIE RTIE 23 Interrupt Enable 3 CMCE INDE DTMFE Indirect Register Access 28 Indirect Data Access— Low Byte IDA[7:0] 29 Indirect Data Access— High Byte IDA[15:8] 30 Indirect Address IAA[7:0] 31 Indirect Address Status IAS Oscillators 32 Oscillator 1 Control OSS1 REL OZ1 O1TAE O1TIE O1E O1SO[1:0] 33 Oscillator 2 Control OSS2 OZ2 O2TAE O2TIE O2E O2SO[1:0] 34 Ringing Oscillator Control RSS RDAC RTAE RTIE ROE RVO TSWS 36 Oscillator 1 Active Timer—Low Byte OATI[7:0] 37 Oscillator 1 Active Timer—High Byte OAT1[15:8] |
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