WM8991 datasheet(38/174 Pages) WOLFSON

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WM8991

Pre-Production

PP, May 2008, Rev 3.1

DEVICE DESCRIPTION

INTRODUCTION

The WM8991 is a low power, high quality audio codec designed to interface with a wide range of

processors and analogue components. A high level of mixed-signal integration in a small 5x5mm

footprint makes it ideal for portable applications such as mobile phones.

Eight highly flexible analogue inputs allow interfacing to up to four microphone inputs plus multiple

stereo or mono line inputs (single-ended or differential). Connections to an external voice CODEC,

FM radio, melody IC, line input, handset MIC and headset MIC are all fully supported. Signal routing

to the output mixers and within the CODEC has been designed for maximum flexibility to support a

wide variety of usage modes.

Ten analogue output drivers are integrated, including a high power, high quality speaker driver,

capable of providing 1W in class D mode or in class AB mode into 8

Ω BTL. Four headphone drivers

are provided, supporting ear speakers and stereo headsets. Fully differential headphone drive is

supported for excellent crosstalk performance and removing the need for large and expensive

headphone capacitors. Four line outputs are available for Tx voice output to a voice CODEC,

interfacing to an additional speaker driver and single-ended or fully differential line output. All outputs

have integrated pop and click suppression. The speaker supply has been designed with low leakage

and high PSRR, to support direct connection to a Lithium battery. In addition to the speaker PGA, six

AC and DC gain settings allow output signal level to be maximised for many commonly-used

SPKVDD/AVDD combinations.

Internal signal routing and amplifier configurations have been optimised to provide the lowest

possible power consumption for a number of common usage scenarios such as voice calls and

music playback.

The stereo ADCs and DACs are of hi-fi quality using a 24-bit, low-order oversampling architecture to

deliver optimum performance. A flexible clocking arrangement supports mixed ADC and DAC sample

rates, while an integrated ultra-low power PLL provides additional flexibility. A high pass filter is

available in the ADC path for removing DC offsets and suppressing low frequency noise such as

mechanical vibration and wind noise. A digital mixing path from the ADC to the DAC provides a

sidetone of enhanced quality during voice calls. DAC soft mute and un-mute is available for pop-free

music playback.

The WM8991 has a highly flexible digital audio interface, supporting a number of protocols, including

I2S, DSP, MSB-First left/right justified, and can operate in master or slave modes. PCM operation is

supported in the DSP mode. A-law and

µ-law companding are also supported. Time division

multiplexing (TDM) is available to allow multiple devices to stream data simultaneously on the same

bus, saving space and power. Alternative DAC interface pins are provided to allow connection to an

additional processor.

The SYSCLK (system clock) provides clocking for the ADCs, DACs, DSP core, class D outputs and

the digital audio interface. SYSCLK can be derived directly from the MCLK pin or via an integrated

PLL, providing flexibility to support a wide range of clocking schemes. All MCLK frequencies typically

used in portable systems are supported for sample rates between 8kHz and 48kHz. A flexible

switching clock for the class D speaker drivers (synchronous with the audio DSP clocks for best

performance) is also derived from SYSCLK. An additional master clock input pin is provided, to

support operation on an alternative clock domain, selectable via a de-glitch circuit.

To allow full software control over all its features, the WM8991 uses a standard 2-wire or 3/4-wire

control interface with readback of key registers supported. It is fully compatible and an ideal partner

for a wide range of industry standard microprocessors, controllers and DSPs. Unused circuitry can

be disabled via software to save power, while low leakage currents extend standby and off time in

portable battery-powered applications. The device address can be selected using the CSB/ADDR

pin.

Versatile GPIO functionality is provided, with support for up to seven button/accessory detect inputs

with interrupt and status readback and flexible de-bouncing options, clock output, alternative MCLK

input, ADCLRC inversion for simultaneous streaming of ADC data to two separate processors and

logic '1' / logic '0' for control of additional external circuitry.

WM8991 Datasheet(PDF) 38 Page - Wolfson Microelectronics plc

WM8991 Datasheet(HTML) 38 Page - Wolfson Microelectronics plc

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