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WM8991 Datasheet(PDF) 48 Page - Wolfson Microelectronics plc |
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WM8991 Datasheet(HTML) 48 Page - Wolfson Microelectronics plc |
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48 / 174 page ![]() WM8991 Pre-Production w PP, May 2008, Rev 3.1 48 INPUT MIXER ENABLE The WM8991 has two analogue input mixers which allow the Input PGAs and Line Inputs to be combined in a number of ways and output to the ADCs or to the Output Mixers via bypass paths. The input mixers INMIXL and INMIXR are enabled by the AINL_ENA and AINR_ENA register bits, as described in Table 7. These control bits also enable the Input Multiplexers and Differential Input drivers, described in the following section. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 9 AINL_ENA (rw) 0b Left Input Path Enable (Enables AINLMUX, INMIXL, DIFFINL and RXVOICE input to AINLMUX) 0 = Input Path disabled 1 = Input Path enabled R2 (02h) 8 AINR_ENA (rw) 0b Right Input Path Enable (Enables AINRMUX, INMIXR, DIFFINR and RXVOICE input to AINRMUX) 0 = Input Path disabled 1 = Input Path enabled Table 7 Input Mixer Enable INPUT MIXER CONFIGURATION The left and right channel input multiplexers AINLMUX and AINRMUX select one of three input sources for the Left and Right channels independently. The three input sources are as follows: 1. INMIXL or INMIXR output (a combination of Input PGAs, line inputs and the internal record path). 2. RXVOICE (a differential to single-ended conversion of RXP and RXN inputs). 3. DIFFINL or DIFFINR output (a differential to single-ended conversion of two Input PGAs). The input source for the multiplexers is controlled by register bits AINLMODE and AINRMODE as described in Table 8. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 3:2 AINLMODE [1:0] 00b AINLMUX Input Source 00 = INMIXL (Left Input Mixer) 01 = RXVOICE (RXP - RXN) 10 = DIFFINL (LIN12 PGA - LIN34 PGA) 11 = (Reserved) R39 (27h) 1:0 AINRMODE [1:0] 00b AINRMUX Input Source 00 = INMIXR (Right Input Mixer) 01 = RXVOICE (RXP - RXN) 10 = DIFFINR (RIN12 PGA - RIN34 PGA) 11 = (Reserved) Table 8 Input Mixer Configuration The Input Mixer configuration is described for each of the three modes in the following sections. Note that the Left and Right multiplexer (mode) settings can be set independently. |
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