LAN9313 datasheet(207/398 Pages) SMSC

207 / 398 page

Three Port 10/100 Managed Ethernet Switch with MII

Datasheet

SMSC LAN9313/LAN9313i

207

Revision 1.2 (04-08-08)

DATASHEET

13.1.6

PHY Management Interface (PMI)

The PMI registers are used to indirectly access the PHY registers. Refer to Section 13.2, "Ethernet

PHY Control and Status Registers," on page 231 for additional information on the PHY registers. Refer

to Section 9.3, "PHY Management Interface (PMI)," on page 127 for information on the PMI.

Note:

The Virtual PHY registers are NOT accessible via these registers.

13.1.6.1

PHY Management Interface Data Register (PMI_DATA)

This register is used in conjunction with the PHY Management Interface Access Register

(PMI_ACCESS) to perform read and write operations to the PHYs.

Note:

The Virtual PHY registers are NOT accessible via these registers.

Offset:

0A4h

Size:

32 bits

BITS

DESCRIPTION

TYPE

DEFAULT

31:16

RESERVED

15:0

MII Data

This field contains the value read from or written to the PHYs. For a write

operation, this register should be first written with the desired data. For a

read operation, the PMI_ACCESS register is first written and once the

command is finished, this register will contain the return data.

Note:

Upon a read, the value returned depends on the MII Write bit

(MIIWnR) in the PHY Management Interface Access Register

(PMI_ACCESS). If MIIWnR is 0, the data is from the PHY. If

MIIWnR is 1, the data is the value that was last written into this

R/W

00000000h

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