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C167CS Datasheet(PDF) 281 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 281 Page - Infineon Technologies AG |
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281 / 517 page  C167CS Derivatives The Asynchronous/Synchronous Serial Interface User’s Manual 11-15 V2.0, 2000-07 11.5 ASC0 Interrupt Control Four bit addressable interrupt control registers are provided for serial channel ASC0. Register S0TIC controls the transmit interrupt, S0TBIC controls the transmit buffer interrupt, S0RIC controls the receive interrupt and S0EIC controls the error interrupt of serial channel ASC0. Each interrupt source also has its own dedicated interrupt vector. S0TINT is the transmit interrupt vector, S0TBINT is the transmit buffer interrupt vector, S0RINT is the receive interrupt vector, and S0EINT is the error interrupt vector. The cause of an error interrupt request (framing, parity, overrun error) can be identified by the error status flags in control register S0CON. Note: In contrast to the error interrupt request flag S0EIR, the error status flags S0FE/ S0PE/S0OE are not reset automatically upon entry into the error interrupt service routine, but must be cleared by software. S0TIC ASC0 Tx Intr. Ctrl. Reg. SFR (FF6CH/B6H) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 - S0 TIR S0 TIE ILVL GLVL -- ------ rwh rw rw rw S0TBIC ASC0 Tx Buf. Intr. Ctrl. Reg. SFR (FF9CH/CEH) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 - S0 TBIR S0 TBIE ILVL GLVL -- ------ rwh rw rw rw S0RIC ASC0 Rx Intr. Ctrl. Reg. SFR (FF6EH/B7H) Reset Value: - - 00H 15 14 13 12 11 10 98765 43210 - S0 RIR S0 RIE ILVL GLVL -- ------ rwh rw rw rw |
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