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C167CS Datasheet(PDF) 285 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 285 Page - Infineon Technologies AG |
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285 / 517 page ![]() C167CS Derivatives The High-Speed Synchronous Serial Interface User’s Manual 12-2 V2.0, 2000-07 Figure 12-2 Synchronous Serial Channel SSC Block Diagram The operating mode of the serial channel SSC is controlled by its bit-addressable control register SSCCON. This register serves for two purposes: • during programming (SSC disabled by SSCEN = ‘0’) it provides access to a set of control bits, • during operation (SSC enabled by SSCEN = ‘1’) it provides access to a set of status flags. Register SSCCON is shown below in each of the two modes. SSCCON SSC Control Reg. (Pr.M.) SFR (FFB2H/D9H) Reset Value: 0000H 15 14 13 12 11 10 9876 543210 SSC EN = 0 SSC MS - SSC AR EN SSC BEN SSC PEN SSC REN SSC TEN - SSC PO SSC PH SSC HB SSCBM rw rw - rw rw rw rw rw rw rw rw rw rw MCB01957 Receive Int. Request Transmit Int. Request Error Int.Request SSC Control Block 16-Bit Shift Register Transmit Buffer Register SSCTB Register SSCRB Receive Buffer Pin Control Status Control Shift Clock Generator Baud Rate Clock Control Slave Clock Master Clock CPU Clock I n t e r n a l B u s MTSR MRST SCLK |
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