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C167CS Datasheet(PDF) 312 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 312 Page - Infineon Technologies AG |
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312 / 517 page ![]() C167CS Derivatives The Bootstrap Loader User’s Manual 15-2 V2.0, 2000-07 15.1 Entering the Bootstrap Loader The C167CS enters BSL mode triggered by external configuration during a hardware reset: • when pin P0L.4 is sampled low at the end of an external reset (EA = ‘0’) • when pin RD is sampled low at the end of an internal reset (EA = ‘1’). In this case the built-in bootstrap loader is activated independent of the selected bus mode. The bootstrap loader code is stored in a special Boot-ROM, no part of the standard mask ROM, OTP, or Flash memory area is required for this. The hardware that activates the BSL during reset may be a simple pull-down resistor on P0L.4 or RD for systems that use this feature upon every hardware reset. You may want to use a switchable solution (via jumper or an external signal) for systems that only temporarily use the bootstrap loader. Figure 15-2 Hardware Provisions to Activate the BSL The ASC0 receiver is only enabled after the identification byte has been transmitted. A half duplex connection to the host is therefore sufficient to feed the BSL. Note: The proper reset configuration for BSL mode requires more pins to be driven besides P0L.4 or RD. For an external reset (EA = ‘0’) bitfield SMOD must be configured as 1011B (see section Section 20.4.1). For an internal reset (EA = ‘1’) pin ALE must be driven to a defined level, e.g. ALE = ‘0’ for the standard bootstrap loader (see section Section 20.4.2). MCA04466 RD P0L.4 Ext. Signal Start Boot ~2 k Proposal for Internal Reset (EA = '1') RD P0L.4 Ext. Signal Start Boot ~8 k Proposal for Internal Reset (EA = '0') RD P0L.4 Ext. Signal Start Boot Proposal for Combined Circuitry ~2 k ~8 k |
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