C167CS datasheet(200/517 Pages) INFINEON

200 / 517 page

C167CS

Derivatives

The External Bus Interface

User’s Manual

9-12

V2.0, 2000-07

9.3

Programmable Bus Characteristics

Important timing characteristics of the external bus interface have been made user

programmable to allow to adapt it to a wide range of different external bus and memory

configurations with different types of memories and/or peripherals.

The following parameters of an external bus cycle are programmable:

• ALE Control defines the ALE signal length and the address hold time after its falling

edge

• Memory Cycle Time (extendable with 1 … 15 waitstates) defines the allowable

access time

• Memory Tri-State Time (extendable with 1 waitstate) defines the time for a data

driver to float

• Read/Write Delay Time defines when a command is activated after the falling edge

of ALE

• READY Control defines, if a bus cycle is terminated internally or externally

Note: Internal accesses are executed with maximum speed and therefore are not

programmable.

External accesses use the slowest possible bus cycle after reset. The bus cycle

timing may then be optimized by the initialization software.

Figure 9-5

Programmable External Bus Cycle

RD/WR

DATA

ADDR

ALE

ALECTL

DATA

RD/WR

ADDR

ALE

MTTC

MCTC

MCD02225

C167CS Datasheet(PDF) 200 Page - Infineon Technologies AG