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C167CS Datasheet(PDF) 242 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 242 Page - Infineon Technologies AG |
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242 / 517 page ![]() C167CS Derivatives The General Purpose Timer Units User’s Manual 10-14 V2.0, 2000-07 Timers T2 and T4 in Counter Mode Counter mode for the auxiliary timers T2 and T4 is selected by setting bit field TxM in the respective register TxCON to ‘001B’. In counter mode timers T2 and T4 can be clocked either by a transition at the respective external input pin TxIN, or by a transition of timer T3’s output toggle latch T3OTL. Figure 10-10 Block Diagram of an Auxiliary Timer in Counter Mode The event causing an increment or decrement of a timer can be a positive, a negative, or both a positive and a negative transition at either the respective input pin, or at the toggle latch T3OTL. Bit field TxI in the respective control register TxCON selects the triggering transition (see Table 10-8). Auxiliary Timer Tx Interrupt Request TxR XOR 0 MUX 1 TxEUD TxUDE MCB02221 TxUD Txl TxIN Edge Select Up/ Down x = 2.4 |
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