| Electronic Components Datasheet Search |
|
LX256VCF2085 Datasheet(PDF) 37 Page - Lattice Semiconductor |
|
|
|||||||||||||||||||||||||||||
LX256VCF2085 Datasheet(HTML) 37 Page - Lattice Semiconductor |
|
37 / 72 page ![]() Lattice Semiconductor ispGDX2 Family Data Sheet 37 LVPECL_out Using LVPECL Differential Signaling — 0.30 — 0.30 — 0.30 — 0.30 ns LVDS_out Using Low Voltage Differen- tial Signaling (LVDS) — 0.80 — 0.80 — 0.80 — 0.80 ns PCI_out Using PCI Standard — 0.60 — 0.60 — 0.60 — 0.60 ns PCI_X_out Using PCI-X Standard — 0.60 — 0.60 — 0.60 — 0.60 ns SSTL2_I_out Using SSTL 2.5V, Class I — 0.30 — 0.30 — 0.30 — 0.30 ns SSTL2_II_out Using SSTL 2.5V, Class II — 0.50 — 0.50 — 0.50 — 0.50 ns SSTL3_I_out Using SSTL 3.3V, Class I — 0.20 — 0.20 — 0.20 — 0.20 ns SSTL3_II_out Using SSTL 3.3V, Class II — 0.40 — 0.40 — 0.40 — 0.40 ns tIOI Input Adjusters LVTTL_in Using 3.3V TTL — 0.00 — 0.00 — 0.00 — 0.00 ns LVCMOS_18_in Using 1.8V CMOS — 0.00 — 0.00 — 0.00 — 0.00 ns LVCMOS_25_in Using 2.5V CMOS — 0.00 — 0.00 — 0.00 — 0.00 ns LVCMOS_33_in Using 3.3V CMOS — 0.00 — 0.00 — 0.00 — 0.00 ns AGP_1X_in Using AGP 1x — 1.00 — 1.00 — 1.00 — 1.00 ns BLVDS_in Using Bus Low Voltage Differ- ential Signaling (BLVDS) — 0.50 — 0.50 — 0.50 — 0.50 ns CTT25_in Using CTT 2.5V — 1.00 — 1.00 — 1.00 — 1.00 ns CTT33_in Using CTT 3.3V — 1.00 — 1.00 — 1.00 — 1.00 ns GTL+_in Using GTL+ — 0.50 — 0.50 — 0.50 — 0.50 ns HSTL_I_in Using HSTL 2.5V, Class I — 0.50 — 0.50 — 0.50 — 0.50 ns HSTL_III_in Using HSTL 2.5V, Class III — 0.60 — 0.60 — 0.60 — 0.60 ns HSTL_IV_in Using HSTL 2.5V, Class IV — 0.60 — 0.60 — 0.60 — 0.60 ns LVPECL_in Using Differential Signaling (LVPECL) — 0.00 — 0.00 — 0.00 — 0.00 ns LVDS_in Using Low Voltage Differen- tial Signaling (LVDS) — 0.50 — 0.50 — 0.50 — 0.50 ns PCI_in Using PCI — 1.00 — 1.00 — 1.00 — 1.00 ns PCI_X_in Using PCI-X — 1.00 — 1.00 — 1.00 — 1.00 ns SSTL2_I_in Using SSTL 2.5V, Class I — 0.50 — 0.50 — 0.50 — 0.50 ns SSTL2_II_in Using SSTL 2.5V, Class II — 0.50 — 0.50 — 0.50 — 0.50 ns SSTL3_I_in Using SSTL 3.3V, Class I — 0.60 — 0.60 — 0.60 — 0.60 ns SSTL3_II_in Using SSTL 3.3V, Class II — 0.60 — 0.60 — 0.60 — 0.60 ns Timing v.2.2 ispGDX2V/B/C, ispGDX2EV/EB/EC Timing Adjusters (Continued) Parameter Description -3 -32 -35 -5 Units Min. Max. Min. Max. Min. Max. Min. Max. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |