LX256VCF2085 datasheet(23/72 Pages) LATTICE

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Lattice Semiconductor

ispGDX2 Family Data Sheet

DC Electrical Characteristics

Over Recommended Operating Conditions

Supply Current

Over Recommended Operating Conditions (ispGDX2-256)

Symbol

Parameter

Condition

Min.

Typ.

Max.

Units

IIL, IIH

Input or I/O Low Leakage

0 ≤ VIN ≤ (VCCO - 0.2V)

—

μA

(VCCO - 0.2V) < VIN ≤ 3.6V

—

μA

IIH

Input High Leakage Current

3.6V < VIN ≤ 5.5V and

3.0V ≤ VCCO ≤ 3.6V

——

IPU

I/O Active Pull-up Current

0 ≤ VIN ≤ 0.7 VCCO

-30

—

-150

μA

IPD

I/O Active Pull-down Current

VIL (MAX) ≤ VIN ≤ VIH (MAX)

—

150

μA

IBHLS

Bus Hold Low Sustaining Current VIN = VIL (MAX)

—

μA

IBHHS

Bus Hold High Sustaining Current VIN = 0.7 VCCO

-30

—

μA

IBHLO

Bus Hold Low Overdrive Current

0 ≤ VIN ≤ VIH (MAX)

—

150

μA

IBHLH

Bus Hold High Overdrive Current

0 ≤ VIN ≤ VIH (MAX)

—

-150

μA

VBHT

Bus Hold Trip Points

VCCO * 0.35

—

VCCO * 0.65

I/O Capacitance

VCCO = 3.3V, 2.5V, 1.8V

—

VCC = 1.8V, VIO = 0 to VIH (MAX)

—

Clock Capacitance

VCCO = 3.3V, 2.5V, 1.8V

—

VCC = 1.8V, VIO = 0 to VIH (MAX)

—

Global Input Capacitance

VCCO = 3.3V, 2.5V, 1.8V

—

VCC = 1.8V, VIO = 0 to VIH (MAX)

—

1. Input or I/O leakage current is measured with the pin conﬁgured as an input or as an I/O with the output driver tri-stated. It is not

measured with the output driver active. Bus maintenance circuits are disabled.

2. TA = 25°C, f = 1.0MHz.

3. 5V tolerant inputs and I/Os should be placed in banks where 3.0V ≤ VCCO ≤ 3.6V. The JTAG ports are not included for the 5V tolerant inter-

face.

Symbol

Description

Power Pins

Vcc (V)

Min.

Typ.

Max.

Units

ICC

1,2

Core Logic Power Supply Current

VCC

3.3

—

59.6

—

2.5

—

58.7

—

1.8

—

60.0

—

GPLL/sysHSI Logic Power Supply

Current

3.3

—

118.7

—

2.5

—

118.7

—

1.8

—

117.5

—

ICCP

GPLL/sysHSI CSPLL Power

Supply Current

VCCP

3.3

—

14.7

—

2.5

—

14.7

—

1.8

—

17.4

—

ICCO

Bank Power Supply Current

VCCO

3.3

—

2.5

—

1.8

—

ICCJ

JTAG Programming Current

VCCJ

3.3

—

1.5

—

2.5

—

1.0

—

1.8

—

800

—

µA

1. 64-input switching frequency at 20 MHz, with one GRP fanout.

2. One GPLL with fVCO = 400 MHz and one sysHSI Block (two receivers and two transmitters) at 622 MHz data rate.

3. All 8-bank reference circuit currents, all I/Os in tristate, inputs held at valid logic levels, and bus maintenance circuits disabled.

4. TA = 25°C

LX256VCF2085 Datasheet(PDF) 23 Page - Lattice Semiconductor

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