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LX256VCF2085 Datasheet(PDF) 5 Page - Lattice Semiconductor

Part # LX256VCF2085
Description  High Performance Interfacing and Switching
PDF  72 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

LX256VCF2085 Datasheet(HTML) 5 Page - Lattice Semiconductor

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Lattice Semiconductor
ispGDX2 Family Data Sheet
5
Figure 2. GDX Block
The output register of the MRB has a built-in bi-directional shift register capability. Each output register correspond-
ing to MRB “n”, receives data output from its two adjacent MRBs, MRB (n-1) and MRB (n+1), to provide shift regis-
ter capability. Like the output register, each input register of the MRB has built-in shift register capability. Each input
register can receive data from its two adjacent MRB input registers, to provide bi-directional shift register capability.
The chaining crosses GDX Block boundaries. The chain of input registers and the chain of output registers can be
combined as one shift register via the GRP.
MUX and Register
Block (MRB)
0
OE
IN
OUT
OE
IN
OUT
OE
IN
OUT
OE
IN
OUT
OE
IN
OUT
OE
IN
OUT
OE
IN
OUT
MUX and Register
Block (MRB)
1
MUX and Register
Block (MRB)
2
GDX Block
GRP
sysIO Bank
32 bits
Control
MUX
Select
16 bits
16 bits
16 bits
4 bits
4 bits
4 bits
4 bits
8
2
MUX and Register
Block (MRB)
3
Control Array
8
2
2
8
2
8
2
8
2
8
8
8
8
2
4
4
4
Nibble 3
MRBs 12-15
Nibble 2
MRBs 8-11
Nibble 1
MRBs 4-7
Nibble 0



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