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HD6433644R Datasheet(PDF) 342 Page - Renesas Technology Corp

Part # HD6433644R
Description  8-Bit Single-Chip Microcomputer
PDF  549 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6433644R Datasheet(HTML) 342 Page - Renesas Technology Corp

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Section 10 Serial Communication Interface
Rev. 6.00 Sep 12, 2006 page 322 of 526
REJ09B0326-0600
10.3.5
Operation in Synchronous Mode
In synchronous mode, SCI3 transmits and receives data in synchronization with clock pulses. This
mode is suitable for high-speed serial communication.
SCI3 has separate transmission and reception units, allowing full-duplex communication with a
shared clock.
As the transmission and reception units are both double-buffered, data can be written during
transmission and read during reception, making possible continuous transmission and reception.
Data Transfer Format: The general data transfer format in synchronous communication is shown
in figure 10.15.
Serial
clock
Serial
data
Note: * High level except in continuous transmission/reception
LSB
MSB
*
*
Bit 1
Bit 0
Bit 2
Bit 3
Bit 4
8 bits
One transfer data unit (character or frame)
Bit 5
Bit 6
Bit 7
Don't
care
Don't
care
Figure 10.15 Data Format in Synchronous Communication
In synchronous communication, data on the communication line is output from one falling edge of
the serial clock until the next falling edge. Data confirmation is guaranteed at the rising edge of the
serial clock.
One transfer data character begins with the LSB and ends with the MSB. After output of the MSB,
the communication line retains the MSB state.
When receiving in synchronous mode, SCI3 latches receive data at the rising edge of the serial
clock.
The data transfer format uses a fixed 8-bit data length.
Parity and multiprocessor bits cannot be added.



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