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HD6433644R Datasheet(PDF) 339 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 339 Page - Renesas Technology Corp |
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339 / 549 page ![]() Section 10 Serial Communication Interface Rev. 6.00 Sep 12, 2006 page 319 of 526 REJ09B0326-0600 Receiving: Figure 10.13 shows an example of a flowchart for data reception. This procedure should be followed for data reception after initializing SCI3. Start End Read bits OER, PER, FER in SSR 1 2 3 4 Read bit RDRF in SSR Read receive data in RDR Clear bit RE to 0 in SCR3 Yes OER + PER + FER = 1? No RDRF = 1? Yes Continue data reception? No No Yes Receive error processing (A) Read bits OER, PER, and FER in the serial status register (SSR) to determine if there is an error. If a receive error has occurred, execute receive error processing. Read SSR and check that bit RDRF is set to 1. If it is, read the receive data in RDR. When the RDR data is read, bit RDRF is cleared to 0 automatically. When continuing data reception, finish reading of bit RDRF and RDR before receiving the stop bit of the current frame. When the data in RDR is read, bit RDRF is cleared to 0 automatically. If a receive error has occurred, read bits OER, PER, and FER in SSR to identify the error, and after carrying out the necessary error processing, ensure that bits OER, PER, and FER are all cleared to 0. Reception cannot be resumed if any of these bits is set to 1. In the case of a framing error, a break can be detected by reading the value of the RXD pin.4. 1. 2. 3. 4. Figure 10.13 Example of Data Reception Flowchart (Asynchronous Mode) |
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