HD6433644R datasheet(338/549 Pages) RENESAS

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Section 10 Serial Communication Interface

Rev. 6.00 Sep 12, 2006 page 318 of 526

REJ09B0326-0600

SCI3 operates as follows when transmitting data.

SCI3 monitors bit TDRE in SSR, and when it is cleared to 0, recognizes that data has been written

to TDR and transfers data from TDR to TSR. It then sets bit TDRE to 1 and starts transmitting. If

bit TIE in SCR3 is set to 1 at this time, a TXI request is made.

Serial data is transmitted from the TXD pin using the relevant data transfer format in table 10.14.

When the stop bit is sent, SCI3 checks bit TDRE. If bit TDRE is cleared to 0, SCI3 transfers data

from TDR to TSR, and when the stop bit has been sent, starts transmission of the next frame. If bit

TDRE is set to 1, bit TEND in SSR is set to 1, and the mark state, in which 1s are transmitted, is

established after the stop bit has been sent. If bit TEIE in SCR3 is set to 1 at this time, a TEI

request is made.

Figure 10.12 shows an example of the operation when transmitting in asynchronous mode.

1 frame

Start

bit

Start

bit

Transmit

data

Transmit

data

Parity

bit

Stop

bit

Parity

bit

Stop

bit

Mark

state

1 frame

0/1

Serial

data

TDRE

TEND

LSI

operation

TXI request

TDRE

cleared to 0

User

processing

Data written

to TDR

TXI request

TEI request

Figure 10.12 Example of Operation when Transmitting in Asynchronous Mode

(8-Bit Data, Parity, 1 Stop Bit)

HD6433644R Datasheet(PDF) 338 Page - Renesas Technology Corp

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