HD6433644R datasheet(265/549 Pages) RENESAS

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Section 9 Timers

Rev. 6.00 Sep 12, 2006 page 245 of 526

REJ09B0326-0600

Timer Interrupt Enable Register (TIER)

Bit

ICIAE

ICIBE

ICICE

ICIDE

OCIAE

OCIBE

OVIE



Initial value

Read/Write

R/W



TIER is an 8-bit read/write register that enables or disables interrupt requests.

TIER is initialized to H'01 upon reset and in standby mode, watch mode, subsleep mode, and

subactive mode.

Bit 7



Input Capture Interrupt A Enable (ICIAE): Bit 7 enables or disables the ICIA interrupt

requested when ICFA is set to 1 in TCSRX.

Bit 7: ICIAE

Description

Interrupt request by ICFA (ICIA) is disabled

(initial value)

Interrupt request by ICFA (ICIA) is enabled

Bit 6



Input Capture Interrupt B Enable (ICIBE): Bit 6 enables or disables the ICIB interrupt

requested when ICFB is set to 1 in TCSRX.

Bit 6: ICIBE

Description

Interrupt request by ICFB (ICIB) is disabled

(initial value)

Interrupt request by ICFB (ICIB) is enabled

Bit 5



Input Capture Interrupt C Enable (ICICE): Bit 5 enables or disables the ICIC interrupt

requested when ICFC is set to 1 in TCSRX.

Bit 5: ICICE

Description

Interrupt request by ICFC (ICIC) is disabled

(initial value)

Interrupt request by ICFC (ICIC) is enabled

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