HD6433644R datasheet(268/549 Pages) RENESAS

268 / 549 page

Section 9 Timers

Rev. 6.00 Sep 12, 2006 page 248 of 526

REJ09B0326-0600

Bit 5



Input Capture Flag C (ICFC): Bit 5 is a status flag that indicates that the FRC value has

been transferred to ICRC by an input capture signal. If BUFEA is set to 1 in TCRX, ICFC is set

by the input capture signal even though the FRC value is not transferred to ICRC. In buffered

operation, ICFC can accordingly be used as an external interrupt, by setting the ICICE bit to 1.

This flag is set by hardware and cleared by software. It cannot be set by software.

Bit 5: ICFC

Description

Clearing condition:

After reading ICFC = 1, cleared by writing 0 to ICFC

(initial value)

Setting condition:

Set by input capture signal

Bit 4



Input Capture Flag D (ICFD): Bit 4 is a status flag that indicates that the FRC value has

been transferred to ICRD by an input capture signal. If BUFEB is set to 1 in TCRX, ICFD is set

by the input capture signal even though the FRC value is not transferred to ICRD. In buffered

operation, ICFD can accordingly be used as an external interrupt, by setting the ICIDE bit to 1.

This flag is set by hardware and cleared by software. It cannot be set by software.

Bit 4: ICFD

Description

Clearing condition:

After reading ICFD = 1, cleared by writing 0 to ICFD

(initial value)

Setting condition:

Set by input capture signal

Bit 3



Output Compare Flag A (OCFA): Bit 3 is a status flag that indicates that the FRC value

has matched OCRA. This flag is set by hardware and cleared by software. It cannot be set by

software.

Bit 3: OCFA

Description

Clearing condition:

After reading OCFA = 1, cleared by writing 0 to OCFA

(initial value)

Setting condition:

Set when FRC matches OCRA

HD6433644R Datasheet(PDF) 268 Page - Renesas Technology Corp

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