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HD6433644R Datasheet(PDF) 278 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 278 Page - Renesas Technology Corp |
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278 / 549 page ![]() Section 9 Timers Rev. 6.00 Sep 12, 2006 page 258 of 526 REJ09B0326-0600 Output Compare Timing: When a compare match occurs, the output level selected by the OLVL bit in TOCR is output at pin FTOA or FTOB. Figure 9.22 shows the output timing for output compare A. N + 1 N N + 1 N NN OCRA φ Compare match A signal FRC OLVLA FTOA (output compare A output pin) Clear* Note: * By execution of a software instruction. Figure 9.22 Output Compare A Output Timing FRC Clear Timing: FRC can be cleared by compare match A. Figure 9.23 shows the timing. N H'0000 FRC φ Compare match A signal Figure 9.23 Clear Timing by Compare Match A |
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