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SH7785 Datasheet(PDF) 148 Page - Renesas Technology Corp

Part # SH7785
Description  32-Bit RISC Microcomputer
PDF  1692 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7785 Datasheet(HTML) 148 Page - Renesas Technology Corp

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5. Exception Handling
Rev.1.00 Jan. 10, 2008 Page 118 of 1658
REJ09B0261-0100
(13) Pre-Execution User Break/Post-Execution User Break
• Source: Fulfilling of a break condition set in the user break controller
• Transition address: VBR + H'00000100, or DBR
• Transition operations:
In the case of a post-execution break, the PC contents for the instruction following the
instruction at which the breakpoint is set are set in SPC. In the case of a pre-execution break,
the PC contents for the instruction at which the breakpoint is set are set in SPC.
The SR and R15 contents when the break occurred are saved in SSR and SGR. Exception code
H'1E0 is set in EXPEVT.
The BL, MD, and RB bits are set to 1 in SR, and a branch is made to PC = VBR + H'0100. It is
also possible to branch to PC = DBR.
For details of PC, etc., when a data break is set, see section 29, User Break Controller (UBC).
User_break_exception()
{
SPC = (pre_execution break? PC : PC + 2);
SSR = SR;
SGR = R15;
EXPEVT = H'0000 01E0;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = (BRCR.UBDE==1 ? DBR : VBR + H
′0000 0100);
}



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