R8CSLASH15 datasheet(116/277 Pages) RENESAS

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R8C/14 Group, R8C/15 Group

13. Timers

Rev.2.10

Jan 19, 2006

Page 104 of 253

REJ09B0164-0210

Figure 13.16

TZMR and PUM Registers in Timer Mode

Timer Z Waveform Output Control Register

Symbol

Address

After Reset

PUM

0084h

00h

Bit Symbol

Bit Name

Function

INT0

_____

Pin One-shot Trigger

Control Bit

INT0

____

Pin One-shot Trigger

Polarity Select Bit

INOSEG

Set to “0” in timer mode

TZOPL

Reserved Bit

Set to “0”

Timer Z Output Level Latch Set to “0” in timer mode

b7 b6 b5 b4

0000 0

b3 b2

INOSTG

b1 b0

—

(b4-b0)

Timer Z Mode Register

Symbol

Address

After Reset

TZMR

0080h

00h

Bit Symbol

Bit Name

Function

NOTES :

2. Refer to 20.4.3 Tim er Z for precautions on the TZS bit.

TZMOD0

—

(b3-b0)

Reserved Bit

Timer Z Count Start Flag(2)

0 : Stops counting

1 : Starts counting

Set to “0”

Timer Z Operating Mode Bit b5 b4

0 0 : Timer mode

TZMOD1

b7 b6 b5 b4

When the TZS bit is set to “1” (count start), the setting value in the TZWC bit is enabled. When the TZWC bit is set to

“0”, Timer Z count value is w ritten to both reload register and counter. Timer Z count value is w ritten to the reload

counter regardless of the setting value in the TZWC bit.

TZWC

TZS

Timer Z Write Control Bit(1)

0 : Write to reload register and counter

1 : Write to reload register only

b3 b2 b1

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