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R8C/15 Datasheet(PDF) 256 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 256 Page - Renesas Technology Corp |
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256 / 277 page  R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 244 of 253 REJ09B0164-0210 20.7 A/D Converter • Write to each bit (other than bit 6) in the ADCON0 register, each bit in the ADCON1 register, or the SMP bit in the ADCON2 register when the A/D conversion stops (before a trigger occurs). When the VCUT bit in the ADCON1 register is changed from “0” (VREF not connected) to “1” (VREF connected), wait for at least 1 µs or longer before the A/D conversion starts. • When changing A/D operating mode, select an analog input pin again. • When using in one-shot mode. Ensure that the A/D conversion is completed and read the AD register. The IR bit in the ADIC register or the ADST bit in the ADCON0 register can determine whether the A/D conversion is completed. • When using In repeat mode, use the undivided main clock for the CPU clock. • If setting the ADST bit in the ADCON0 register to “0” (A/D conversion stops) by a program and the A/ D conversion is forcibly terminated during the A/D conversion operation, the conversion result of the A/D converter will be indeterminate. If the ADST bit is set to “0” by a program, do not use the value of AD register. • Connect 0.1µF capacitor between the AVCC/VREF pin and AVSS pin. |
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