R8CSLASH15 datasheet(259/277 Pages) RENESAS

259 / 277 page

R8C/14 Group, R8C/15 Group

20. Precautions

Rev.2.10

Jan 19, 2006

Page 247 of 253

REJ09B0164-0210

20.8.1.4

How to Access

Write “0” to the corresponding bits before writing “1” when setting the FMR01, FMR02, or FMR11 bit

to “1”. Do not generate an interrupt between writing “0” and “1”.

20.8.1.5

Rewriting User ROM Area

In EW0 Mode, if the power supply voltage drops while rewriting any block in which the rewrite control

program is stored, the flash memory may not be able to be rewritten because the rewrite control

program cannot be rewritten correctly. In this case, use standard serial I/O mode.

20.8.1.6

Program

Do not write additions to the already programmed address.

20.8.1.7

Reset Flash Memory

When setting the FMSTP bit in the FMR0 register to “1” (flash memory stops) during erase-suspend

in EW1 mode, a CPU stops and cannot return. Do not set the FMSTP bit to “1”.

20.8.1.8

Entering Stop Mode or Wait Mode

Do not enter stop mode or wait mode during erase-suspend.

20.8.1.9

Interrupt Request Generation during Auto-erase Operation in EW1

Mode

When an interrupt request is generated during erasing with FMR01 = 1 (CPU rewrite mode enabled)

in FMR0 register, FMR11 = 1 (EW1 mode) in FMR1 register and FMR40 = 0 (disable erase suspend

function) in FMR4 register, the CPU may not operate properly.

Select any of the following 3 processes as a software countermeasure:

(a) Disable an interrupt by setting the priority level of all maskable interrupts to level 0. Note that

disabling the interrupts by the I flag will not be in the software countermeasure

(b) Set the FMR40 = 1 (enable erase suspend function) and the I flag = 1 (enable interrupt) when

using the FMR11 = 1 (EW1 mode)

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