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4501 Datasheet(PDF) 124 Page - Renesas Technology Corp |
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4501 Datasheet(HTML) 124 Page - Renesas Technology Corp |
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124 / 212 page ![]() 2.1 I/O pins 2-7 4501 Group APPLICATION Rev.2.01 Feb 07, 2005 REJ09B0192-0201 Pull-up control register PU2 at reset : 00002 at RAM back-up : state retained W Pull-up transistor OFF Pull-up transistor ON Pull-up transistor OFF Pull-up transistor ON Pull-up transistor OFF Pull-up transistor ON Pull-up transistor OFF Pull-up transistor ON Port D3/K pull-up transistor control bit Port D2/C pull-up transistor control bit Port P21/AIN1 pull-up transistor control bit Port P20/AIN0 pull-up transistor control bit 0 1 0 1 0 1 0 1 PU23 PU22 PU21 PU20 Note: “W” represents write enabled. (5) Key-on wakeup control register K2 Register K2 controls the ON/OFF of the key-on wakeup function of ports P20, P21, D2/C and D3/K. Set the contents of this register through register A with the TK2A instruction. The contents of register K2 is transferred to register A with the TAK2 instruction. Table 2.1.5 shows the key-on wakeup control register K2. Table 2.1.5 Key-on wakeup control register K2 Key-on wakeup control register K2 at reset : 00002 at RAM back-up : state retained R/W Key-on wakeup invalid Key-on wakeup valid Key-on wakeup invalid Key-on wakeup valid Key-on wakeup invalid Key-on wakeup valid Key-on wakeup invalid Key-on wakeup valid Port D3/K key-on wakeup control bit Port D2/C key-on wakeup control bit Port P21/AIN1 key-on wakeup control bit Port P20/AIN0 key-on wakeup control bit 0 1 0 1 0 1 0 1 K23 K22 K21 K20 Note: “R” represents read enabled, and “W” represents write enabled. (6) Pull-up control register PU2 Register PU2 controls the ON/OFF of the ports P20, P21, D2/C and D3/K pull-up transistor. Set the contents of this register through register A with the TPU2A instruction. Table 2.1.6 shows the pull-up control register PU2. Table 2.1.6 Pull-up control register PU2 |
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