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7477 Datasheet(PDF) 103 Page - Renesas Technology Corp |
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7477 Datasheet(HTML) 103 Page - Renesas Technology Corp |
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103 / 361 page ![]() HARDWARE 1-96 7470/7471/7477/7478 GROUP USER’S MANUAL 1.13 Serial I/O Fig. 1.13A.4 Serial I/O receive operation Fig. 1.13A.5 Serial I/O receive timing chart P14/SIN b0 D1 D2 D3 D0 b0 P14/SIN D0 D5 D2 D6 D7 D3 D4 D0 D1 1 b6 0 1 2 3 Synchronous clock Serial I/O register Serial I/O register Synchronous clock Synchronous clock Serial I/O register by rising edge Interrupt request register 1 (Address 00FC16) A Synchronous clock, internal clock divided by 8 to 512, or external clock SIN pin SRDY signal Writing data to Serial I/O register Serial I/O interrupt enable bit Serial I/O interrupt request bit A: • Clearing by writing “0” to the Serial I/O interrupt request bit. • Clearing by accepting the Serial I/O interrupt. Reading into Serial I/O register SARDY signal D1 D2 D3 D4 D5 D6 D7 D0 |
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