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AM3892 Datasheet(PDF) 195 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 195 Page - Texas Instruments |
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195 / 299 page ![]() AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 Table 8-37. EMAC Control Registers (continued) EMAC0 HEX ADDRESS EMAC1 HEX ADDRESS ACRONYM REGISTER NAME 0x4A10 00A4 0x4A12 00A4 RXINTSTATMASKED Receive Interrupt Status (Masked) 0x4A10 00A8 0x4A12 00A8 RXINTMASKSET Receive Interrupt Mask Set 0x4A10 00AC 0x4A12 00AC RXINTMASKCLEAR Receive Interrupt Mask Clear 0x4A10 00B0 0x4A12 00B0 MACINTSTATRAW MAC Interrupt Status (Unmasked) 0x4A10 00B4 0x4A12 00B4 MACINTSTATMASKED MAC Interrupt Status (Masked) 0x4A10 00B8 0x4A12 00B8 MACINTMASKSET MAC Interrupt Mask Set 0x4A10 00BC 0x4A12 00BC MACINTMASKCLEAR MAC Interrupt Mask Clear 0x4A10 0100 0x4A12 0100 RXMBPENABLE Receive Multicast/Broadcast/Promiscuous Channel Enable 0x4A10 0104 0x4A12 0104 RXUNICASTSET Receive Unicast Enable Set 0x4A10 0108 0x4A12 0108 RXUNICASTCLEAR Receive Unicast Clear 0x4A10 010C 0x4A12 010C RXMAXLEN Receive Maximum Length 0x4A10 0110 0x4A12 0110 RXBUFFEROFFSET Receive Buffer Offset 0x4A10 0114 0x4A12 0114 RXFILTERLOWTHRESH Receive Filter Low Priority Frame Threshold 0x4A10 0120 0x4A12 0120 RX0FLOWTHRESH Receive Channel 0 Flow Control Threshold 0x4A10 0124 0x4A12 0124 RX1FLOWTHRESH Receive Channel 1 Flow Control Threshold 0x4A10 0128 0x4A12 0128 RX2FLOWTHRESH Receive Channel 2 Flow Control Threshold 0x4A10 012C 0x4A12 012C RX3FLOWTHRESH Receive Channel 3 Flow Control Threshold 0x4A10 0130 0x4A12 0130 RX4FLOWTHRESH Receive Channel 4 Flow Control Threshold 0x4A10 0134 0x4A12 0134 RX5FLOWTHRESH Receive Channel 5 Flow Control Threshold 0x4A10 0138 0x4A12 0138 RX6FLOWTHRESH Receive Channel 6 Flow Control Threshold 0x4A10 013C 0x4A12 013C RX7FLOWTHRESH Receive Channel 7 Flow Control Threshold 0x4A10 0140 0x4A12 0140 RX0FREEBUFFER Receive Channel 0 Free Buffer Count 0x4A10 0144 0x4A12 0144 RX1FREEBUFFER Receive Channel 1 Free Buffer Count 0x4A10 0148 0x4A12 0148 RX2FREEBUFFER Receive Channel 2 Free Buffer Count 0x4A10 014C 0x4A12 014C RX3FREEBUFFER Receive Channel 3 Free Buffer Count 0x4A10 0150 0x4A12 0150 RX4FREEBUFFER Receive Channel 4 Free Buffer Count 0x4A10 0154 0x4A12 0154 RX5FREEBUFFER Receive Channel 5 Free Buffer Count 0x4A10 0158 0x4A12 0158 RX6FREEBUFFER Receive Channel 6 Free Buffer Count 0x4A10 015C 0x4A12 015C RX7FREEBUFFER Receive Channel 7 Free Buffer Count 0x4A10 0160 0x4A12 0160 MACCONTROL MAC Control 0x4A10 0164 0x4A12 0164 MACSTATUS MAC Status 0x4A10 0168 0x4A12 0168 EMCONTROL Emulation Control 0x4A10 016C 0x4A12 016C FIFOCONTROL FIFO Control 0x4A10 0170 0x4A12 0170 MACCONFIG MAC Configuration 0x4A10 0174 0x4A12 0174 SOFTRESET Soft Reset 0x4A10 01D0 0x4A12 01D0 MACSRCADDRLO MAC Source Address Low Bytes 0x4A10 01D4 0x4A12 01D4 MACSRCADDRHI MAC Source Address High Bytes 0x4A10 01D8 0x4A12 01D8 MACHASH1 MAC Hash Address 1 0x4A10 01DC 0x4A12 01DC MACHASH2 MAC Hash Address 2 0x4A10 01E0 0x4A12 01E0 BOFFTEST Back Off Test Copyright © 2010–2011, Texas Instruments Incorporated Peripheral Information and Timings 195 Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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