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AM3892 Datasheet(PDF) 196 Page - Texas Instruments

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Part # AM3892
Description  AM389x Sitara ARM Microprocessors (MPUs)
PDF  299 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM3892 Datasheet(HTML) 196 Page - Texas Instruments

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AM3894
AM3892
SPRS681A – OCTOBER 2010 – REVISED MARCH 2011
www.ti.com
Table 8-37. EMAC Control Registers (continued)
EMAC0 HEX ADDRESS
EMAC1 HEX ADDRESS
ACRONYM
REGISTER NAME
0x4A10 01E4
0x4A12 01E4
TPACETEST
Transmit Pacing Algorithm Test
0x4A10 01E8
0x4A12 01E8
RXPAUSE
Receive Pause Timer
0x4A10 01EC
0x4A12 01EC
TXPAUSE
Transmit Pause Timer
0x4A10 0200 - 0x4A10 02FC
0x4A12 0200 - 0x4A12 02FC
(see Table 8-38)
EMAC Network Statistics Registers
0x4A10 0500
0x4A12 0500
MACADDRLO
MAC Address Low Bytes, Used in
Receive Address Matching
0x4A10 0504
0x4A12 0504
MACADDRHI
MAC Address High Bytes, Used in
Receive Address Matching
0x4A10 0508
0x4A12 0508
MACINDEX
MAC Index
0x4A10 0600
0x4A12 0600
TX0HDP
Transmit Channel 0 DMA Head
Descriptor Pointer
0x4A10 0604
0x4A12 0604
TX1HDP
Transmit Channel 1 DMA Head
Descriptor Pointer
0x4A10 0608
0x4A12 0608
TX2HDP
Transmit Channel 2 DMA Head
Descriptor Pointer
0x4A10 060C
0x4A12 060C
TX3HDP
Transmit Channel 3 DMA Head
Descriptor Pointer
0x4A10 0610
0x4A12 0610
TX4HDP
Transmit Channel 4 DMA Head
Descriptor Pointer
0x4A10 0614
0x4A12 0614
TX5HDP
Transmit Channel 5 DMA Head
Descriptor Pointer
0x4A10 0618
0x4A12 0618
TX6HDP
Transmit Channel 6 DMA Head
Descriptor Pointer
0x4A10 061C
0x4A12 061C
TX7HDP
Transmit Channel 7 DMA Head
Descriptor Pointer
0x4A10 0620
0x4A12 0620
RX0HDP
Receive Channel 0 DMA Head
Descriptor Pointer
0x4A10 0624
0x4A12 0624
RX1HDP
Receive Channel 1 DMA Head
Descriptor Pointer
0x4A10 0628
0x4A12 0628
RX2HDP
Receive Channel 2 DMA Head
Descriptor Pointer
0x4A10 062C
0x4A12 062C
RX3HDP
Receive Channel 3 DMA Head
Descriptor Pointer
0x4A10 0630
0x4A12 0630
RX4HDP
Receive Channel 4 DMA Head
Descriptor Pointer
0x4A10 0634
0x4A12 0634
RX5HDP
Receive Channel 5 DMA Head
Descriptor Pointer
0x4A10 0638
0x4A12 0638
RX6HDP
Receive Channel 6 DMA Head
Descriptor Pointer
0x4A10 063C
0x4A12 063C
RX7HDP
Receive Channel 7 DMA Head
Descriptor Pointer
0x4A10 0640
0x4A12 0640
TX0CP
Transmit Channel 0 Completion
Pointer
0x4A10 0644
0x4A12 0644
TX1CP
Transmit Channel 1 Completion
Pointer
0x4A10 0648
0x4A12 0648
TX2CP
Transmit Channel 2 Completion
Pointer
0x4A10 064C
0x4A12 064C
TX3CP
Transmit Channel 3 Completion
Pointer
0x4A10 0650
0x4A12 0650
TX4CP
Transmit Channel 4 Completion
Pointer
0x4A10 0654
0x4A12 0654
TX5CP
Transmit Channel 5 Completion
Pointer
0x4A10 0658
0x4A12 0658
TX6CP
Transmit Channel 6 Completion
Pointer
196
Peripheral Information and Timings
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