AM3892 datasheet(207/299 Pages) TI

207 / 299 page

AM3894

AM3892

www.ti.com

SPRS681A – OCTOBER 2010 – REVISED MARCH 2011

Table 8-52. GPMC Registers (continued)

HEX ADDRESS

ACRONYM

0x5000 0074 + (0x0000 0030 * i)

GPMC_CONFIG6_0 -

Parameter Configuration 6_0-5

GPMC_CONFIG6_5

0x5000 0078 + (0x0000 0030 * i)

GPMC_CONFIG7_0 -

Parameter Configuration 7_0-5

GPMC_CONFIG7_5

0x5000 007C + (0x0000 0030 * i)

GPMC_NAND_COMMAND_0 -

NAND Command 0-5

GPMC_NAND_COMMAND_5

0x5000 0080 + (0x0000 0030 * i)

GPMC_NAND_ADDRESS_0 -

NAND Address 0-5

GPMC_NAND_ADDRESS_5

0x5000 0084 + (0x0000 0030 * i)

GPMC_NAND_DATA_0 -

NAND Data 0-5

GPMC_NAND_DATA_5

0x5000 01E0

GPMC_PREFETCH_CONFIG1

Prefetch Configuration 1

0x5000 01E4

GPMC_PREFETCH_CONFIG2

Prefetch Configuration 2

0x5000 01EC

GPMC_PREFETCH_CONTROL

Prefetch Control

0x5000 01F0

GPMC_PREFETCH_STATUS

Prefetch Status

0x5000 01F4

GPMC_ECC_CONFIG

ECC Configuration

0x5000 01F8

GPMC_ECC_CONTROL

ECC Control

0x5000 01FC

GPMC_ECC_SIZE_CONFIG

ECC Size Configuration

0x5000 0200 + (0x0000 0004 * j)

GPMC_ECC0_RESULT -

ECC0-8 Result

GPMC_ECC8_RESULT

0x5000 0240 + (0x0000 0010 * i)

GPMC_BCH_RESULT0_0 -

BCH Result 0_0-5

GPMC_BCH_RESULT0_5

0x5000 0244 + (0x0000 0010 * i)

GPMC_BCH_RESULT1_0 -

BCH Result 1_0-5

GPMC_BCH_RESULT1_5

0x5000 0248 + (0x0000 0010 * i)

GPMC_BCH_RESULT2_0 -

BCH Result 2_0-5

GPMC_BCH_RESULT2_5

0x5000 024C + (0x0000 0010 * i)

GPMC_BCH_RESULT3_0 -

BCH Result 3_0-5

GPMC_BCH_RESULT3_5

0x5000 0300 + (0x0000 0010 * i)

GPMC_BCH_RESULT4_0 -

BCH Result 4_0-5

GPMC_BCH_RESULT4_5

0x5000 0304 + (0x0000 0010 * i)

GPMC_BCH_RESULT5_0 -

BCH Result 5_0-5

GPMC_BCH_RESULT5_5

0x5000 0308 + (0x0000 0010 * i)

GPMC_BCH_RESULT6_0 -

BCH Result 6_0-5

GPMC_BCH_RESULT6_5

0x5000 02D0

GPMC_BCH_SWDATA

BCH Data

Table 8-53. ELM Registers(1)

HEX ADDRESS

ACRONYM

0x4808 0000

ELM_REVISION

Revision

0x4808 0010

ELM_SYSCONFIG

Configuration

0x4808 0014

ELM_SYSSTATUS

Status

0x4808 0018

ELM_IRQSTATUS

Interrupt status

0x4808 001C

ELM_IRQENABLE

Interrupt enable

0x4808 0020

ELM_LOCATION_CONFIG

ECC algorithm parameters

0x4808 0080

ELM_PAGE_CTRL

Page definition

0x4808 0400 + (0x40 * i)

ELM_SYNDROME_FRAGMENT_0_i

Input syndrome polynomial bits 0 to 31

0x4808 0404 + (0x40 * i)

ELM_SYNDROME_FRAGMENT_1_i

Input syndrome polynomial bits 32 to 63

0x4808 0408 + (0x40 * i)

ELM_SYNDROME_FRAGMENT_2_i

Input syndrome polynomial bits 64 to 95

0x4808 040C + (0x40 * i)

ELM_SYNDROME_FRAGMENT_3_i

Input syndrome polynomial bits 96 to 127

0x4808 0410 + (0x40 * i)

ELM_SYNDROME_FRAGMENT_4_i

Input syndrome polynomial bits 128 to 159

0x4808 0414 + (0x40 * i)

ELM_SYNDROME_FRAGMENT_5_i

Input syndrome polynomial bits 160 to 191

(1)

i = 0 to 7.

Peripheral Information and Timings

207

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