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AM3892 Datasheet(PDF) 257 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 257 Page - Texas Instruments |
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257 / 299 page ![]() AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 Table 8-80. McBSP Registers (continued) HEX ADDRESS ACRONYM REGISTER NAME 0x4700 0050 RCERD_REG McBSP receive channel enable partition D 0x4700 0054 XCERC_REG McBSP transmit channel enable partition C 0x4700 0058 XCERD_REG McBSP transmit channel enable partition D 0x4700 005C RCERE_REG McBSP receive channel enable partition E 0x4700 0060 RCERF_REG McBSP receive channel enable partition F 0x4700 0064 XCERE_REG McBSP transmit channel enable partition E 0x4700 0068 XCERF_REG McBSP transmit channel enable partition F 0x4700 006C RCERG_REG McBSP receive channel enable partition G 0x4700 0070 RCERH_REG McBSP receive channel enable partition H 0x4700 0074 XCERG_REG McBSP transmit channel enable partition G 0x4700 0078 XCERH_REG McBSP transmit channel enable partition H 0x4700 007C REV_REG McBSP revision number 0x4700 0080 RINTCLR_REG McBSP receive interrupt clear 0x4700 0084 XINTCLR_REG McBSP transmit interrupt clear 0x4700 0088 ROVFLCLR_REG McBSP receive overflow interrupt clear 0x4700 008C SYSCONFIG_REG McBSP system configuration 0x4700 0090 THRSH2_REG McBSP transmit buffer threshold (DMA or IRQ trigger) 0x4700 0094 THRSH1_REG McBSP receive buffer threshold (DMA or IRQ trigger) 0x4700 00A0 IRQSTATATUS McBSP interrupt status (OCP compliant IRQ line) 0x4700 00A4 IRQENABLE McBSP interrupt enable (OCP compliant IRQ line) 0x4700 00A8 WAKEUPEN McBSP wakeup enable 0x4700 00AC XCCR_REG McBSP transmit configuration control 0x4700 00B0 RCCR_REG McBSP receive configuration control 0x4700 00B4 XBUFFSTAT_REG McBSP transmit buffer status 0x4700 00B8 RBUFFSTAT_REG McBSP receive buffer status 0x4700 00C0 STATUS_REG McBSP status Copyright © 2010–2011, Texas Instruments Incorporated Peripheral Information and Timings 257 Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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