AM79C976 datasheet(215/309 Pages) AMD

215 / 309 page

8/01/00

Am79C976

215

P R E L I M INARY

SVID is aliased to the PCI config-

uration space register Subsystem

Vendor ID (offset 2Ch).

SVID is read only. Write opera-

tions are ignored. SVID is cleared

to 0 by H_RESET and is not af-

fected by S_RESET or by setting

the STOP bit.

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Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

15-0

SID

Subsystem ID. SID is used to-

gether with SVID (BCR23, bits

15-0) to uniquely identify the add-

board

subsystem

the

Am79C976 controller is used in.

The value of SID is up to the sys-

tem vendor. A value of 0 (the de-

fault)

indicates

that

the

Am79C976 controller does not

support subsystem identification.

SID is aliased to the PCI configu-

ration space register Subsystem

ID (offset 2Eh).

SID is read only. Write operations

are ignored. SID is cleared to 0 by

H_RESET and is not affected by

S_RESET or by setting the STOP

bit.

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Bit

Name

Description

Note: Bits 7-0 in this register are programmable

through the EEPROM.

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

15-0

SRAM_SIZE SRAM Size. Specifies the total

size of the SSRAM buffer in units

of 512-byte pages. For example,

assume that the external memory

consists of one 64K X 32 bit SS-

RAM, for a total of 256K bytes. In

this case SRAM_SIZE should be

set to 512 (256K divided by 512).

This field must be initialized to the

appropriate value, either by the

EEPROM or by the host CPU.

SRAM_SIZE must be set to a val-

ue less than or equal to 2000h.

Values larger than 2000h will

cause incorrect behavior.

Note:

The

minimum

allowed

number of pages is eight for nor-

mal

network

operation.

The

Am79C976 controller will not op-

erate correctly with less than the

eight pages of memory. When

the minimum number of pages is

used, these pages must be allo-

cated four each for transmit and

receive.

CAUTION:

Programming

SRAM_BND and SRAM_SIZE to

the same value will cause data

corruption.

Read/Write

accessible.

SRAM_SIZE is set to 000000b

during H_RESET and is unaffect-

ed by S_RESET or STOP.

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Bit

Name

Description

Note: Bits 7-0 in this register are programmable

through the EEPROM.

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

15-0

SRAM_BND SRAM Boundary. Specifies the

size of the transmit buffer portion

of the SRAM in units of 512-byte

pages.

For

example

SRAM_BND is set to 10, then

5120 bytes of the SRAM will be

allocated for the transmit buffer

and the rest will be allocated for

the receive buffer.

The transmit buffer in the SRAM

begins at address 0 and ends at

the address (SRAM_BND*512)-

1. Therefore, the receive buffer

always begins on a 512-byte

boundary.

SRAM_BND must be initialized to

an appropriate value, either by

the EEPROM or by the host CPU.

SRAM_BND must be set to a val-

ue less than or equal to IFFCh.

AM79C976 Datasheet(PDF) 215 Page - Advanced Micro Devices

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