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AMD-K6 Datasheet(PDF) 225 Page - Advanced Micro Devices

Part # AMD-K6
Description  AMD-K6 Processor
PDF  346 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-K6 Datasheet(HTML) 225 Page - Advanced Micro Devices

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Chapter 11
Test and Debug
207
20695H/0—March 1998
AMD-K6® Processor Data Sheet
Preliminary Information
L oadi n g 00 00 1b i n to the IR s h i f t regi s t er dur i ng the
Capture-IR state results in loading the SAMPLE/PRELOAD
instruction.
For each entry into the Shift-IR state, the IR shift register is
serially shifted by one bit toward the TDO pin. During the shift,
the most significant bit of the IR shift register is loaded from
the TDI pin.
The IR output register is loaded from the IR shift register in the
Update-IR state, and the current instruction is defined by the IR
output register. See “TAP Instructions” on page 211 for a list and
definition of the instructions supported by the AMD-K6.
Boundary Scan Register (BSR). The BSR is a Test Data Register
consisting of the interconnection of 152 boundary-scan cells.
Each output and bidirectional pin of the processor requires a
two-bit cell, where one bit corresponds to the pin and the other
bit is the output enable for the pin. When a 0 is shifted into the
enable bit of a cell, the corresponding pin is floated, and when
a 1 is shifted into the enable bit, the pin is driven valid. Each
input pin requires a one-bit cell that corresponds to the pin.
The last cell of the BSR is reserved and does not correspond to
any processor pin.
The total number of bits that comprise the BSR is 281. Table 38
on page 209 lists the order of these bits, where TDI is the input
to bit 280, and TDO is driven from the output of bit 0. The
entries listed as pin_E (where pin is an output or bidirectional
signal) are the enable bits.
If the BSR is the register selected by the current instruction
and the TAP controller is in the Capture-DR state, the
processor loads the BSR shift register as follows:
s
If the current instruction is SAMPLE/PRELOAD, then the
current state of each input, output, and bidirectional pin is
loaded. A bidirectional pin is treated as an output if its
enable bit equals 1, and it is treated as an input if its enable
bit equals 0.
s
If the current instruction is EXTEST, then the current state
of each input pin is loaded. A bidirectional pin is treated as
an input, regardless of the state of its enable.



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