| Electronic Components Datasheet Search |
|
AMD-K6 Datasheet(PDF) 102 Page - Advanced Micro Devices |
|
|
|||||||||||||||||||||||||||||
AMD-K6 Datasheet(HTML) 102 Page - Advanced Micro Devices |
|
102 / 346 page ![]() 84 Signal Descriptions Chapter 5 AMD-K6® Processor Data Sheet 20695H/0—March 1998 Preliminary Information 5.7 APCHK# (Address Parity Check) Output Summary If the processor detects an address parity error during an inquire cycle, APCHK# is asserted for one clock. The processor does not take an internal exception as the result of detecting an address bus parity check, and system logic must respond appropriately to the assertion of this signal. The processor ensures that APCHK # does not glitch, enabling the signal to be used as a clocking source for system logic. Driven APCHK # is driven valid the clock edge after the clock edge on which the processor samples EADS# asserted. It is negated off the next clock edge. APCHK# is always driven except in Tri-State Test mode. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |