DP83620 datasheet(41/105 Pages) TI

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DP83620

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SNLS339C – JANUARY 2011 – REVISED APRIL 2013

5.11.2.2 Checking Current Parameter Values

Prior to setting Threshold values, it is recommended that software check current adapted values. The

thresholds may then be set relative to the adapted values. The current adapted values can be read using

the LQDR register by setting the SAMPLE_PARAM bit [13] of LQDR, address (1Eh).

For example, to read the DBLW current value:

1. Write 2400h to LQDR (1Eh) to set the SAMPLE_PARAM bit and set the LQ_PARAM_SEL[2:0] to 010.

2. Read LQDR (1Eh). Current DBLW value is returned in the low 8 bits.

5.11.2.3 Threshold Control

The LQDR (1Eh) register also provides a method of programming high and low thresholds for each of the

five parameters that can be monitored. The register implements an indirect read/write mechanism.

Writes are accomplished by writing data, address, and a write strobe to the register. Reads are

accomplished by writing the address to the register, and reading back the value of the selected threshold.

Setting thresholds to the maximum or minimum values will disable the threshold comparison since values

have to exceed the threshold to generate a warning condition.

Warnings are not generated if the parameter is equal to the threshold. By default, all thresholds are

disabled by setting to the minimum or maximum values. Table 5-4 shows the five parameters and range of

values:

Table 5-4. Link Quality Monitor Parameter Ranges

Parameter

Minimum Value

Maximum Value

Min (2-s comp)

Max (2-s comp)

DEQ_C1

-128

+127

0x80

0x7F

DAGC

+255

0x00

0xFF

DBLW

-128

+127

0x80

0x7F

Frequency Offset

-128

+127

0x80

0x7F

Frequency Control

-128

+127

0x80

0x7F

SNR Variance

+2304

0x0000

0x900

Note that values are signed 2-s complement values except for DAGC and Variance which are always

positive. The maximum SNR Variance is calculated by assuming the worst-case squared error (144) is

accumulated every 8 ns for 8*220 ns (roughly 8 ms or exactly 1,048,576 clock cycles).

For example, to set the DBLW Low threshold to -38:

1. Write 14DAh to LQDR to set the Write_LQ_Thr bit, select the DBLW Low Threshold, and write data of

-38 (0xDA).

2. Write 8000 to LQMR to enable the Link Quality Monitor (if not already enabled).

5.11.3 TDR Cable Diagnostics

The DP83620 implements a Time Domain Reflectometry (TDR) method of cable length measurement and

evaluation which can be used to evaluate a connected twisted pair cable. The TDR implementation

involves sending a pulse out on either the Transmit or Receive conductor pair and observing the results

on either pair. By observing the types and strength of reflections on each pair, software can determine the

following:

— Cable short

— Cable open

— Distance to fault

— Identify which pair has a fault

— Pair skew

Configuration

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