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DP83620 Datasheet(PDF) 64 Page - Texas Instruments |
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DP83620 Datasheet(HTML) 64 Page - Texas Instruments |
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64 / 105 page  X1 X2 R1 CL2 CL1 DP83620 SNLS339C – JANUARY 2011 – REVISED APRIL 2013 www.ti.com Crystal A 25 MHz, parallel, 20 pF load crystal resonator should be used if a crystal source is desired. Figure 9-3 shows a typical connection for a crystal resonator circuit. The load capacitor values will vary with the crystal vendors; check with the vendor for the recommended loads. The oscillator circuit is designed to drive a parallel resonance AT cut crystal with a minimum drive level of 100 µW and a maximum of 500 µW. If a crystal is specified for a lower drive level, a current limiting resistor should be placed in series between X2 and the crystal. As a starting point for evaluating an oscillator circuit, if the requirements for the crystal are not known, CL1 and CL2 should be set at 33 pF, and R1 should be set at 0 Ω. Specification for 25 MHz crystal are listed in Table 9-3. Figure 9-3. Crystal Oscillator Circuit 64 Design Guidelines Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DP83620 |
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