DP83620 datasheet(86/105 Pages) TI

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DP83620

SNLS339C – JANUARY 2011 – REVISED APRIL 2013

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Table 10-21. PHY Control Register (PHYCR), address 0x19 (continued)

Bit

Bit Name

Default

Description

LED_CNFG[1]

0, RW

LED Configuration

LED_CNFG[0]

Strap, RW

LED_CNFG[1]

LED_CNFG[0]

Mode Description

Don't care

Mode 1

Mode 2

Mode 3

In Mode 1, LEDs are configured as follows:

LED_LINK = ON for Good Link, OFF for No Link

LED_SPEED = ON in 100 Mb/s, OFF in 10 Mb/s

LED_ACT = ON for Activity, OFF for No Activity

In Mode 2, LEDs are configured as follows:

LED_LINK = ON for Good Link, BLINK for Activity

LED_SPEED = ON in 100 Mb/s, OFF in 10 Mb/s

LED_ACT = ON for Collision, OFF for No Collision

In Mode 3, LEDs are configured as follows:

LED_LINK = ON for Good Link, BLINK for Activity

LED_SPEED = ON in 100 Mb/s, OFF in 10 Mb/s

LED_ACT = ON for Full Duplex, OFF for Half Duplex

4:0

PHYADDR[4:0]

Strap, RW

PHY Address: PHY address for port.

Note: The local PHY address cannot be changed via a broadcast write - writing to

PHY address 0x1F register 0x19 will not change the PHYADDR bits.

10.2.7 10Base-T Status/Control Register (10BTSCR)

This register is used for control and status for 10BASE-T device operation.

Table 10-22. 10Base-T Status/Control Register (10BTSCR), address 0x1A

Bit

Bit Name

Default

Description

RESERVED

0, RO

RESERVED: Writes ignored, read as 0.

14:12

RESERVED

000, RW

RESERVED: Must be zero.

11:9

SQUELCH

100, RW

Squelch Configuration:

Used to set the Squelch 'ON' threshold for the receiver.

Default Squelch 'ON' is 330mV peak.

LOOPBACK_10_DIS

0, RW

10Base-T Loopback Disable:

This bit is OR’ed with bit 14 (Loopback) in the BMCR.

1 = 10BT Loopback is disabled

0 = 10BT Loopback is enabled

LP_DIS

0, RW

Normal Link Pulse Disable:

This bit is OR’ed with the MAC_FORCE_LINK_10 signal.

1 = Transmission of NLPs is disabled.

0 = Transmission of NLPs is enabled.

FORCE_LINK_10

0, RW

Force 10 Mb Good Link:

This bit is OR’ed with the MAC_FORCE_LINK_10 signal.

1 = Forced Good 10 Mb Link.

0 = Normal Link Status.

FORCE_POL COR

0, RW

Force 10 Mb Polarity Correction:

1 = Force inverted polarity

0 = Normal polarity

POLARITY

0, RO/LH

10 Mb Polarity Status:

This bit is a duplication of bit 12 in the PHYSTS register. Both bits will be cleared

upon a read of either register.

1 = Inverted Polarity detected.

0 = Correct Polarity detected.

AUTOPOL_DIS

0, RW

Auto Polarity Detection & Correction Disable:

1 = Polarity Correction disabled

0 = Polarity Correction enabled

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