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ICS1531 Datasheet(PDF) 26 Page - Integrated Circuit Systems

Part # ICS1531
Description  Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator
PDF  76 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS1531 Datasheet(HTML) 26 Page - Integrated Circuit Systems

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ICS1531 Rev N 12/1/99
December, 1999
26
Chapter 6
Register Set
ICS1531 Data Sheet - Preliminary
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
2Ch
OUTPUT MUX R/W
7
High_Drive
Select drive strength for all ADC outputs
0
6
OE_OSC
Enable OSCOUT output
1
5-4 OSC_Sel
Select output from 4-way MUX to OSCOUT
0
3
Reserved
Reserved
0
2
REFSEL
Select REF status
0
1-0 LCKSEL
Select PLL lock status
1
2Dh
PLL Reset
Write
7-4 MCLK_Reset
Writing 5xh resets MCLK PLL and loads working Regs
26h to 2Bh.
N/A
3-0 PNLCLK_Reset
Writing xAh resets PNLCLK PLL and loads working
Regs 20h to 25h.
N/A
2Eh-2Fh Reserved
N/A
30h
ADC CTRL
R/W
7
ADC_OE
Enable ADC output
0
6
ADC_Sel
Select ADC capture
0
5
ADC_Inv
Invert ADC outputs
1
4
Force_ADC
Force all ADC output buffers off
0
3
CLAMP_Pol
Select polarity of signal to a clamp
0
2
CLAMP_Sel
Select source to a clamp
0
1
VA_Disable
Disable video amplifier
0
0
FA_Disable
Disable fine adjust
0
31h
R_COARSE
R/W
7-6 Reserved
Reserved
0
5
Reserved
Reserved
1
4-2 Reserved
Reserved
0
1-0 R_Coarse_Adj
Adjust video amplifier gain to red channel of ADC
0
32h
G_COARSE
R/W
7-6 Reserved
Reserved
0
5
Reserved
Reserved
1
4-2 Reserved
Reserved
0
1-0 G_Coarse_Adj
Adjust video amplifier gain to green channel of ADC
0
33h
B_COARSE
R/W
7-6 Reserved
Reserved
0
5
Reserved
Reserved
1
4-2 Reserved
Reserved
0
1-0 B_Coarse_Adj
Adjust video amplifier gain to blue channel of ADC
0
34h
R_FINE
R/W
7-0 R_Fine_Adj
Adjust VRT for red channel of ADC
20
35h
G_FINE
R/W
7-0 G_Fine_Adj
Adjust VRT for green channel of ADC
20
36h
B_FINE
R/W
7-0 B_Fine_Adj
Adjust VRT for red channel of ADC
20
37h
PSEL
R/W
7
ADCRCLK_Inv
Invert ADCRCLK signal
1
6-5 ADCRCLK_Del
Delay ADCRCLK signal
2
4
Reserved
Reserved
0
3
Cal_Access
Select access to Calibration/Test Regs
0
2
PSEL3
Select general-purpose programmable output 3
0
1
PSEL2
Select general-purpose programmable output 2
0
0
PSEL1
Select general-purpose programmable output 1
0
38h
R_COMP_OFF R/W
7-4 R_C_O_B
Select red comparator offset, ‘B’ channel
7
3-0 R_C_O_A
Select red comparator offset, ‘A’ channel
7
39h
G_COMP_OFF R/W
7-4 G_C_O_B
Select green comparator offset, ‘B’ channel
7
3-0 G_C_O_A
Select green comparator offset, ‘A’ channel
7
Table 6-2.
Register Set Outline (Continued)
Register
Index
Register Name
Register
Access
Bit #
Bit Name
Brief Description
Reset
Value



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