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AM3874 Datasheet(PDF) 127 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 127 Page - Texas Instruments |
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127 / 361 page  AM3874, AM3871 www.ti.com SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 Table 3-43. Video Input 0 (Digital) Terminal Functions (continued) SIGNAL TYPE(1) OTHER(2) (3) MUXED DESCRIPTION NAME NO. VIN[0]A_FLD/ VIN[0]A, UART5, Video Input 0 Port B Vertical Sync1 input. Discrete VIN[0]B_VSYNC/ IPU I2C[2], GP2 vertical synchronization signal for Port B 8-bit YCbCr UART5_RXD/ AA20 I DVDD PINCNTL136 capture without embedded syncs (“BT.601” modes). Not I2C[2]_SCL/ DSIS:0 used in RGB or 16-bit YCbCr capture modes. GP2[1] Video Input 0 Port A Vertical Sync0 input. Discrete VIN[0]A_VSYNC/ UART5, GP2 IPU vertical synchronization signal for Port A RGB capture UART5_CTS/ AD20 I PINCNTL139 DVDD mode or YCbCr capture without embedded syncs GP2[4] DSIS: 0 (“BT.601” modes). CAMERA_I/F, Video Input 0 Port B Field ID input. Discrete field VIN[0]B_FLD/ IPU GP0 identification signal for Port B 8-bit YCbCr capture CAM_D[4]/ AD17 I DVDD_C PINCNTL167 without embedded syncs (“BT.601” modes). Not used in GP0[21] DSIS: 0 RGB or 16-bit YCbCr capture modes. CAMERA_I/F, VIN[0]A_FLD/ GP0 IPU CAM_D[5]/ AC22 I PINCNTL166 DVDD_C GP0[20] DSIS: 0 Video Input 0 Port A Field ID input. Discrete field MM: MUX1 identification signal for Port A RGB capture mode or YCbCr capture without embedded syncs (“BT.601” VIN[0]A_FLD/ VIN[0]B, UART5, modes). VIN[0]B_VSYNC/ I2C[2], GP2 IPU UART5_RXD/ AA20 I PINCNTL136 DVDD I2C[2]_SCL/ DSIS: 0 GP2[1] MM: MUX0 CAMERA_I/F, VIN[0]B_DE/ Video Input 0 Port B Data Enable input. Discrete data IPU GP0 CAM_D[6]/ AC15 I valid signal for Port B RGB capture mode or YCbCr DVDD_C PINCNTL165 GP0[19] capture without embedded syncs (“BT.601” modes). DSIS: 0 CAMERA_I/F, VIN[0]A_DE/ GP0 IPU CAM_D[7]/ AB17 I PINCNTL164 DVDD_C GP0[18] DSIS: 0 Video Input 0 Port A Data Enable input. Discrete data MM: MUX1 valid signal for Port A RGB capture mode or YCbCr VIN[0]A_DE/ VIN[0]B, UART5, capture without embedded syncs ("BT.601" modes). VIN[0]B_HSYNC/ I2C[2], GP2 IPU UART5_TXD/ AE21 I PINCNTL135 DVDD I2C[2]_SDA/ DSIS: 0 GP2[0] MM: MUX0 Copyright © 2011–2013, Texas Instruments Incorporated Device Pins 127 Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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