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AM3874 Datasheet(PDF) 124 Page - Texas Instruments

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Part # AM3874
Description  AM387x Sitara??ARM Processors
PDF  361 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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AM3874 Datasheet(HTML) 124 Page - Texas Instruments

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AM3874, AM3871
SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013
www.ti.com
3.2.21 USB
Table 3-42. USB Terminal Functions
SIGNAL
TYPE(1)
OTHER(2) (3)
MUXED
DESCRIPTION
NAME
NO.
USB0
–
USB0 bidirectional data differential signal pair
USB0_DP
AG11
A I/O
–
VDDA_USB_3P3
[plus/minus].
–
When the USB0 PHY is powered down, these pins
USB0_DM
AH11
A I/O
–
VDDA_USB_3P3
should be left unconnected.
USB0 OTG identification input.
–
USB0_ID
AG10
A I
–
When the USB0 PHY is powered down, this pin should
VDDA_USB_3P3
be left unconnected.
USB0 charger enable.
–
USB0_CE
AH10
A O
–
When the USB0 PHY is powered down, this pin should
VDDA_USB_3P3
be left unconnected.
5-V USB0 VBUS comparator input.
This analog input pin senses the level of the USB VBUS
–
USB0_VBUSIN
AG12
A I
–
voltage and should connect directly to the USB VBUS
VDDA_USB_3P3
voltage. When the USB0 PHY is powered down, this pin
should be left unconnected.
When this pin is used as USB0_DRVVBUS and the
USB0 Controller is operating as a Host, this signal is
GP0
used by the USB0 Controller to enable the external
USB0_DRVVBUS/
IPD
AF11
O
PINCNTL270
VBUS charge pump.
GP0[7]
DVDD
DSIS: N/A
When the USB0 PHY is powered down, this pin should
be left unconnected.
USB1
–
USB1 bidirectional data differential signal pair
USB1_DP
AG13
A I/O
–
VDDA_USB_3P3
[plus/minus].
–
When the USB1 PHY is powered down, these pins
USB1_DM
AH13
A I/O
–
VDDA_USB_3P3
should be left unconnected.
USB1 OTG identification input.
–
USB1_ID
AH12
A I
–
When the USB1 PHY is powered down, this pin should
VDDA_USB_3P3
be left unconnected.
USB1 charger enable.
–
USB1_CE
AH14
A O
–
When the USB1 PHY is powered down, this pin should
VDDA_USB_3P3
be left unconnected.
5-V USB1 VBUS comparator input.
This analog input pin senses the level of the USB VBUS
–
USB1_VBUSIN
AG14
A I
–
voltage and should connect directly to the USB VBUS
VDDA_USB_3P3
voltage. When the USB1 PHY is powered down, this pin
should be left unconnected.
When this pin is used as USB1_DRVVBUS and the
AUD_CLKIN0/
USB1 Controller is operating as a Host, this signal is
AUD_CLKIN0,
MCA[0]_AXR[7]/
used by the USB1 Controller to enable the external
IPD
MCA[0], MCA[3],
MCA[0]_AHCLKX/
L5
O
VBUS charge pump.
DVDD
PINCNTL14
MCA[3]_AHCLKX/
DSIS: N/A
When the USB1 PHY is powered down, this pin should
USB1_DRVVBUS
be left unconnected.
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, MM = Multi Muxed, DSIS = De-
selected Input State
(2)
IPD = Internal Pulldown Active, IPU = Internal Pullup Active, DIS = Internal Pull Disabled. This represents the default state of the
Internal Pull after Reset. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown
resistors are required, see Section 4.5.1, Pullup/Pulldown Resistors and Section 7.3.17, Pin Behaviors at Reset.
(3)
Specifies the operating I/O supply voltage for each signal
124
Device Pins
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