AM3874 datasheet(193/361 Pages) TI

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AM3874, AM3871

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SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013

Table 7-13. SERDES_CLKN/P AC Coupling Capacitors Recommendations (continued)

PARAMETER

MIN

TYP

MAX

UNIT

SERDES_CLKN/P AC coupling capacitor package size(1)(2)

0402

0603

EIA

(1)

L x W, 10 Mil units, that is, a 0402 is a 40 x 20 Mil surface mount capacitor.

(2)

The physical size of the capacitor should be as small as practical. Use the same size on both lines in each pair placed side-by-side.

The differential clock source is required to meet the REFCLK AC Specifications outlined in the PCI

EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 2.0, at the input to the AC coupling

capacitors.

In addition, LVDS clock sources that are compliant to the above specification, but with the following

exceptions, are also acceptable:

Table 7-14. Acceptable Exceptions to the REFCLK AC Specifications for LVDS Clock Sources

PARAMETER

MIN

MAX

UNIT

VIH

Differential High-Level Input Voltage

125

1000

VIL

Differential Low-Level Input Voltage

-1000

-125

7.4.3

AUD_CLKINx Input Clocks

External clock inputs can optionally be provided at the AUD_CLKIN0/1/2 pins to serve as a reference

clocks for the following modules:

•

McASP3/4/5

•

McBSP

•

TIMER1/2/3/4/5/6/7/8

7.4.4

CLKIN32 Input Clock

An external 32768-Hz clock input can optionally be provided at the CLKIN32 pin to serve as a reference

clock in place of the RTCDIVIDER clock for the following Modules:

•

RTC

•

GPIO0/1/2/3

•

TIMER1/2/3/4/5/6/7/8

•

ARM Cortex-A8

•

SYNCTIMER

The CLKIN32 source must meet the timing requirements shown in Table 7-18.

7.4.5

External Input Clocks

There are three pins referred to as AUD_CLKIN0,1,2 which are used as optional sources for HDMI I2S,

McASP, McBSP and TIMER1-8. The maximum IO pin frequency for these three input clocks is 50MHz.

7.4.6

Output Clocks Select Logic

The device includes two selectable general-purpose clock outputs (CLKOUT0 and CLKOUT1). The source

for these output clocks is controlled by the CLKOUT_MUX register in the Control Module (see Figure 7-

11).

Power, Reset, Clocking, and Interrupts

193

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